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13 Commits
| Author | SHA1 | Date |
|---|---|---|
Katya
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9f371543b3 | 1 year ago |
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Katya
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8086a52104 | 1 year ago |
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Katya
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510aa6be06 | 1 year ago |
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Katya
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2a796e6bb4 | 1 year ago |
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Katya
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2bfa9de2d0 | 1 year ago |
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Katya
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58996b8327 | 1 year ago |
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Katya
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7b98c2081a | 1 year ago |
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Katya
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5cbd35423f | 1 year ago |
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Katya
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ce1c704267 | 1 year ago |
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Katya
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8f89bdf93a | 1 year ago |
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Katya
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1bf1bcdd27 | 1 year ago |
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Katya
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dce350d0ae | 1 year ago |
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Katya
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84dddc2e48 | 1 year ago |
Binary file not shown.
Binary file not shown.
@ -1 +0,0 @@
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:00000001FF
|
||||
Binary file not shown.
@ -1,36 +0,0 @@
|
||||
:100000000C945A000C9477000C9477000C947700B1
|
||||
:100010000C9477000C9477000C9477000C94770084
|
||||
:100020000C9477000C9477000C9477000C94770074
|
||||
:100030000C9477000C9477000C9477000C94770064
|
||||
:100040000C9477000C9477000C9477000C94770054
|
||||
:100050000C9477000C9477000C9477000C94770044
|
||||
:100060000C9477000C9477000C9477000C94770034
|
||||
:100070000C9477000C9477000C9477000C94770024
|
||||
:100080000C9477000C9477000C9477000C94770014
|
||||
:100090000C9477000C9477000C9477000C94770004
|
||||
:1000A0000C9477000C9477000C9477000C947700F4
|
||||
:1000B0000C94770011241FBECFEFD8E0DEBFCDBF78
|
||||
:1000C00011E0A0E0B1E0E8E1F2E002C005900D929D
|
||||
:1000D000AC30B107D9F721E0ACE0B1E001C01D922E
|
||||
:1000E000AC30B207E1F70E948F000C940A010C9427
|
||||
:1000F00000003C9A44982FEF81EE94E0215080401C
|
||||
:100100009040E1F700C000003C982FEF81EE94E0B2
|
||||
:10011000215080409040E1F700C000000895CF9347
|
||||
:10012000DF93CDB7DEB72C970FB6F894DEBF0FBEC6
|
||||
:10013000CDBF8CE0E0E0F1E0DE01119601900D9280
|
||||
:100140008A95E1F783E08AB98BB917B818B8699A2C
|
||||
:100150006A98729888E090E00E94F70078940E9474
|
||||
:10016000D4006E012DE0C20ED11C0E947900339B99
|
||||
:10017000FCCF719A8FEF93EDE0E381509040E04027
|
||||
:10018000E1F700C000008E010F5F1F4FF801F190F2
|
||||
:100190008F018F2D0E9402018F2D0E94DE000C1511
|
||||
:1001A0001D05A1F77198E1CF6A9A729A6B9A87B18F
|
||||
:1001B000866087B980E58093AC000895429880936B
|
||||
:1001C000AE008091AD00882384F0EDEAF0E0719AF2
|
||||
:1001D0002FEF81EE94E0215080409040E1F700C085
|
||||
:1001E000000071988081882394F7429A08951092B4
|
||||
:1001F000C5008093C40088E18093C1008EE08093A5
|
||||
:10020000C2000895E0ECF0E0908195FFFDCF80936F
|
||||
:08021000C6000895F894FFCF29
|
||||
:0C021800014E20280100019C402801013B
|
||||
:00000001FF
|
||||
@ -1,385 +0,0 @@
|
||||
|
||||
GccApplication1.elf: file format elf32-avr
|
||||
|
||||
Sections:
|
||||
Idx Name Size VMA LMA File off Algn
|
||||
0 .data 0000000c 00800100 00000218 0000028c 2**0
|
||||
CONTENTS, ALLOC, LOAD, DATA
|
||||
1 .text 00000218 00000000 00000000 00000074 2**1
|
||||
CONTENTS, ALLOC, LOAD, READONLY, CODE
|
||||
2 .comment 00000030 00000000 00000000 00000298 2**0
|
||||
CONTENTS, READONLY
|
||||
3 .note.gnu.avr.deviceinfo 00000040 00000000 00000000 000002c8 2**2
|
||||
CONTENTS, READONLY
|
||||
4 .debug_aranges 00000088 00000000 00000000 00000308 2**0
|
||||
CONTENTS, READONLY, DEBUGGING
|
||||
5 .debug_info 00000d91 00000000 00000000 00000390 2**0
|
||||
CONTENTS, READONLY, DEBUGGING
|
||||
6 .debug_abbrev 00000b49 00000000 00000000 00001121 2**0
|
||||
CONTENTS, READONLY, DEBUGGING
|
||||
7 .debug_line 00000601 00000000 00000000 00001c6a 2**0
|
||||
CONTENTS, READONLY, DEBUGGING
|
||||
8 .debug_frame 000000cc 00000000 00000000 0000226c 2**2
|
||||
CONTENTS, READONLY, DEBUGGING
|
||||
9 .debug_str 0000054c 00000000 00000000 00002338 2**0
|
||||
CONTENTS, READONLY, DEBUGGING
|
||||
10 .debug_loc 000001f6 00000000 00000000 00002884 2**0
|
||||
CONTENTS, READONLY, DEBUGGING
|
||||
11 .debug_ranges 00000058 00000000 00000000 00002a7a 2**0
|
||||
CONTENTS, READONLY, DEBUGGING
|
||||
|
||||
Disassembly of section .text:
|
||||
|
||||
00000000 <__vectors>:
|
||||
0: 0c 94 5a 00 jmp 0xb4 ; 0xb4 <__ctors_end>
|
||||
4: 0c 94 77 00 jmp 0xee ; 0xee <__bad_interrupt>
|
||||
8: 0c 94 77 00 jmp 0xee ; 0xee <__bad_interrupt>
|
||||
c: 0c 94 77 00 jmp 0xee ; 0xee <__bad_interrupt>
|
||||
10: 0c 94 77 00 jmp 0xee ; 0xee <__bad_interrupt>
|
||||
14: 0c 94 77 00 jmp 0xee ; 0xee <__bad_interrupt>
|
||||
18: 0c 94 77 00 jmp 0xee ; 0xee <__bad_interrupt>
|
||||
1c: 0c 94 77 00 jmp 0xee ; 0xee <__bad_interrupt>
|
||||
20: 0c 94 77 00 jmp 0xee ; 0xee <__bad_interrupt>
|
||||
24: 0c 94 77 00 jmp 0xee ; 0xee <__bad_interrupt>
|
||||
28: 0c 94 77 00 jmp 0xee ; 0xee <__bad_interrupt>
|
||||
2c: 0c 94 77 00 jmp 0xee ; 0xee <__bad_interrupt>
|
||||
30: 0c 94 77 00 jmp 0xee ; 0xee <__bad_interrupt>
|
||||
34: 0c 94 77 00 jmp 0xee ; 0xee <__bad_interrupt>
|
||||
38: 0c 94 77 00 jmp 0xee ; 0xee <__bad_interrupt>
|
||||
3c: 0c 94 77 00 jmp 0xee ; 0xee <__bad_interrupt>
|
||||
40: 0c 94 77 00 jmp 0xee ; 0xee <__bad_interrupt>
|
||||
44: 0c 94 77 00 jmp 0xee ; 0xee <__bad_interrupt>
|
||||
48: 0c 94 77 00 jmp 0xee ; 0xee <__bad_interrupt>
|
||||
4c: 0c 94 77 00 jmp 0xee ; 0xee <__bad_interrupt>
|
||||
50: 0c 94 77 00 jmp 0xee ; 0xee <__bad_interrupt>
|
||||
54: 0c 94 77 00 jmp 0xee ; 0xee <__bad_interrupt>
|
||||
58: 0c 94 77 00 jmp 0xee ; 0xee <__bad_interrupt>
|
||||
5c: 0c 94 77 00 jmp 0xee ; 0xee <__bad_interrupt>
|
||||
60: 0c 94 77 00 jmp 0xee ; 0xee <__bad_interrupt>
|
||||
64: 0c 94 77 00 jmp 0xee ; 0xee <__bad_interrupt>
|
||||
68: 0c 94 77 00 jmp 0xee ; 0xee <__bad_interrupt>
|
||||
6c: 0c 94 77 00 jmp 0xee ; 0xee <__bad_interrupt>
|
||||
70: 0c 94 77 00 jmp 0xee ; 0xee <__bad_interrupt>
|
||||
74: 0c 94 77 00 jmp 0xee ; 0xee <__bad_interrupt>
|
||||
78: 0c 94 77 00 jmp 0xee ; 0xee <__bad_interrupt>
|
||||
7c: 0c 94 77 00 jmp 0xee ; 0xee <__bad_interrupt>
|
||||
80: 0c 94 77 00 jmp 0xee ; 0xee <__bad_interrupt>
|
||||
84: 0c 94 77 00 jmp 0xee ; 0xee <__bad_interrupt>
|
||||
88: 0c 94 77 00 jmp 0xee ; 0xee <__bad_interrupt>
|
||||
8c: 0c 94 77 00 jmp 0xee ; 0xee <__bad_interrupt>
|
||||
90: 0c 94 77 00 jmp 0xee ; 0xee <__bad_interrupt>
|
||||
94: 0c 94 77 00 jmp 0xee ; 0xee <__bad_interrupt>
|
||||
98: 0c 94 77 00 jmp 0xee ; 0xee <__bad_interrupt>
|
||||
9c: 0c 94 77 00 jmp 0xee ; 0xee <__bad_interrupt>
|
||||
a0: 0c 94 77 00 jmp 0xee ; 0xee <__bad_interrupt>
|
||||
a4: 0c 94 77 00 jmp 0xee ; 0xee <__bad_interrupt>
|
||||
a8: 0c 94 77 00 jmp 0xee ; 0xee <__bad_interrupt>
|
||||
ac: 0c 94 77 00 jmp 0xee ; 0xee <__bad_interrupt>
|
||||
b0: 0c 94 77 00 jmp 0xee ; 0xee <__bad_interrupt>
|
||||
|
||||
000000b4 <__ctors_end>:
|
||||
b4: 11 24 eor r1, r1
|
||||
b6: 1f be out 0x3f, r1 ; 63
|
||||
b8: cf ef ldi r28, 0xFF ; 255
|
||||
ba: d8 e0 ldi r29, 0x08 ; 8
|
||||
bc: de bf out 0x3e, r29 ; 62
|
||||
be: cd bf out 0x3d, r28 ; 61
|
||||
|
||||
000000c0 <__do_copy_data>:
|
||||
c0: 11 e0 ldi r17, 0x01 ; 1
|
||||
c2: a0 e0 ldi r26, 0x00 ; 0
|
||||
c4: b1 e0 ldi r27, 0x01 ; 1
|
||||
c6: e8 e1 ldi r30, 0x18 ; 24
|
||||
c8: f2 e0 ldi r31, 0x02 ; 2
|
||||
ca: 02 c0 rjmp .+4 ; 0xd0 <__do_copy_data+0x10>
|
||||
cc: 05 90 lpm r0, Z+
|
||||
ce: 0d 92 st X+, r0
|
||||
d0: ac 30 cpi r26, 0x0C ; 12
|
||||
d2: b1 07 cpc r27, r17
|
||||
d4: d9 f7 brne .-10 ; 0xcc <__do_copy_data+0xc>
|
||||
|
||||
000000d6 <__do_clear_bss>:
|
||||
d6: 21 e0 ldi r18, 0x01 ; 1
|
||||
d8: ac e0 ldi r26, 0x0C ; 12
|
||||
da: b1 e0 ldi r27, 0x01 ; 1
|
||||
dc: 01 c0 rjmp .+2 ; 0xe0 <.do_clear_bss_start>
|
||||
|
||||
000000de <.do_clear_bss_loop>:
|
||||
de: 1d 92 st X+, r1
|
||||
|
||||
000000e0 <.do_clear_bss_start>:
|
||||
e0: ac 30 cpi r26, 0x0C ; 12
|
||||
e2: b2 07 cpc r27, r18
|
||||
e4: e1 f7 brne .-8 ; 0xde <.do_clear_bss_loop>
|
||||
e6: 0e 94 8f 00 call 0x11e ; 0x11e <main>
|
||||
ea: 0c 94 0a 01 jmp 0x214 ; 0x214 <_exit>
|
||||
|
||||
000000ee <__bad_interrupt>:
|
||||
ee: 0c 94 00 00 jmp 0 ; 0x0 <__vectors>
|
||||
|
||||
000000f2 <STMReset>:
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void STMReset() {
|
||||
DDRC |= (1 << PINC4);
|
||||
f2: 3c 9a sbi 0x07, 4 ; 7
|
||||
PORTC &= ~(1 << PINC4);
|
||||
f4: 44 98 cbi 0x08, 4 ; 8
|
||||
#else
|
||||
//round up by default
|
||||
__ticks_dc = (uint32_t)(ceil(fabs(__tmp)));
|
||||
#endif
|
||||
|
||||
__builtin_avr_delay_cycles(__ticks_dc);
|
||||
f6: 2f ef ldi r18, 0xFF ; 255
|
||||
f8: 81 ee ldi r24, 0xE1 ; 225
|
||||
fa: 94 e0 ldi r25, 0x04 ; 4
|
||||
fc: 21 50 subi r18, 0x01 ; 1
|
||||
fe: 80 40 sbci r24, 0x00 ; 0
|
||||
100: 90 40 sbci r25, 0x00 ; 0
|
||||
102: e1 f7 brne .-8 ; 0xfc <STMReset+0xa>
|
||||
104: 00 c0 rjmp .+0 ; 0x106 <STMReset+0x14>
|
||||
106: 00 00 nop
|
||||
_delay_ms(100);
|
||||
DDRC &= ~(1 << PINC4);
|
||||
108: 3c 98 cbi 0x07, 4 ; 7
|
||||
10a: 2f ef ldi r18, 0xFF ; 255
|
||||
10c: 81 ee ldi r24, 0xE1 ; 225
|
||||
10e: 94 e0 ldi r25, 0x04 ; 4
|
||||
110: 21 50 subi r18, 0x01 ; 1
|
||||
112: 80 40 sbci r24, 0x00 ; 0
|
||||
114: 90 40 sbci r25, 0x00 ; 0
|
||||
116: e1 f7 brne .-8 ; 0x110 <STMReset+0x1e>
|
||||
118: 00 c0 rjmp .+0 ; 0x11a <STMReset+0x28>
|
||||
11a: 00 00 nop
|
||||
11c: 08 95 ret
|
||||
|
||||
0000011e <main>:
|
||||
//bytes++;
|
||||
//PORTE = 0;
|
||||
//}
|
||||
|
||||
int main(void)
|
||||
{
|
||||
11e: cf 93 push r28
|
||||
120: df 93 push r29
|
||||
122: cd b7 in r28, 0x3d ; 61
|
||||
124: de b7 in r29, 0x3e ; 62
|
||||
126: 2c 97 sbiw r28, 0x0c ; 12
|
||||
128: 0f b6 in r0, 0x3f ; 63
|
||||
12a: f8 94 cli
|
||||
12c: de bf out 0x3e, r29 ; 62
|
||||
12e: 0f be out 0x3f, r0 ; 63
|
||||
130: cd bf out 0x3d, r28 ; 61
|
||||
uint8_t data_to_send[] = {0x01, 0x4E, 0x20, 0x28, 0x01, 0x00, 0x01, 0x9C, 0x40, 0x28, 0x01, 0x01};
|
||||
132: 8c e0 ldi r24, 0x0C ; 12
|
||||
134: e0 e0 ldi r30, 0x00 ; 0
|
||||
136: f1 e0 ldi r31, 0x01 ; 1
|
||||
138: de 01 movw r26, r28
|
||||
13a: 11 96 adiw r26, 0x01 ; 1
|
||||
13c: 01 90 ld r0, Z+
|
||||
13e: 0d 92 st X+, r0
|
||||
140: 8a 95 dec r24
|
||||
142: e1 f7 brne .-8 ; 0x13c <main+0x1e>
|
||||
DDRD = 3; // USART PD0, PD1
|
||||
144: 83 e0 ldi r24, 0x03 ; 3
|
||||
146: 8a b9 out 0x0a, r24 ; 10
|
||||
PORTD = 3;
|
||||
148: 8b b9 out 0x0b, r24 ; 11
|
||||
///////////////////////////////
|
||||
//STM NRST
|
||||
DDRC = 0;
|
||||
14a: 17 b8 out 0x07, r1 ; 7
|
||||
PORTC = 0;
|
||||
14c: 18 b8 out 0x08, r1 ; 8
|
||||
///////////////////////////////
|
||||
DDRE |= (1 << PORTE1);
|
||||
14e: 69 9a sbi 0x0d, 1 ; 13
|
||||
DDRE &= ~(1 << PORTE2);
|
||||
150: 6a 98 cbi 0x0d, 2 ; 13
|
||||
PORTE &= ~(1 << PORTE2);
|
||||
152: 72 98 cbi 0x0e, 2 ; 14
|
||||
//PORTE = 2;
|
||||
|
||||
USART_Init(8); // óñòàíîâêà ñêîðîñòè 115200: (16 000 000 / (16 * 115 200) ) - 1, U2X = 0
|
||||
154: 88 e0 ldi r24, 0x08 ; 8
|
||||
156: 90 e0 ldi r25, 0x00 ; 0
|
||||
158: 0e 94 f7 00 call 0x1ee ; 0x1ee <USART_Init>
|
||||
sei();
|
||||
15c: 78 94 sei
|
||||
|
||||
// -----SPI-----
|
||||
SPI_MasterInit();
|
||||
15e: 0e 94 d4 00 call 0x1a8 ; 0x1a8 <SPI_MasterInit>
|
||||
162: 6e 01 movw r12, r28
|
||||
164: 2d e0 ldi r18, 0x0D ; 13
|
||||
166: c2 0e add r12, r18
|
||||
168: d1 1c adc r13, r1
|
||||
//PORTE &= ~(1 << PORTE1); // STATUS âûêë
|
||||
//for (uint8_t i = 0; i < 12; i++) {
|
||||
//USART_Transmit(data_to_send[i]);
|
||||
//}
|
||||
// $05$4E$20$28$01$00$03$9C$40$28$01$01
|
||||
STMReset();
|
||||
16a: 0e 94 79 00 call 0xf2 ; 0xf2 <STMReset>
|
||||
//_delay_ms(100);
|
||||
//PORTE &= ~(1 << PORTE1); // STATUS âûêë
|
||||
//
|
||||
//PORTE |= (1 << PORTE1); // STATUS âêë
|
||||
|
||||
if ((PINC)&(1<<PORTC3)) { // STM ãîòîâ ê ïðèåìó
|
||||
16e: 33 9b sbis 0x06, 3 ; 6
|
||||
170: fc cf rjmp .-8 ; 0x16a <main+0x4c>
|
||||
PORTE |= (1 << PORTE1); // STATUS âêë
|
||||
172: 71 9a sbi 0x0e, 1 ; 14
|
||||
174: 8f ef ldi r24, 0xFF ; 255
|
||||
176: 93 ed ldi r25, 0xD3 ; 211
|
||||
178: e0 e3 ldi r30, 0x30 ; 48
|
||||
17a: 81 50 subi r24, 0x01 ; 1
|
||||
17c: 90 40 sbci r25, 0x00 ; 0
|
||||
17e: e0 40 sbci r30, 0x00 ; 0
|
||||
180: e1 f7 brne .-8 ; 0x17a <main+0x5c>
|
||||
182: 00 c0 rjmp .+0 ; 0x184 <main+0x66>
|
||||
184: 00 00 nop
|
||||
186: 8e 01 movw r16, r28
|
||||
188: 0f 5f subi r16, 0xFF ; 255
|
||||
18a: 1f 4f sbci r17, 0xFF ; 255
|
||||
_delay_ms(1000);
|
||||
for (int i = 0; i < 12; i++) {
|
||||
USART_Transmit(data_to_send[i]);
|
||||
18c: f8 01 movw r30, r16
|
||||
18e: f1 90 ld r15, Z+
|
||||
190: 8f 01 movw r16, r30
|
||||
192: 8f 2d mov r24, r15
|
||||
194: 0e 94 02 01 call 0x204 ; 0x204 <USART_Transmit>
|
||||
SPI_MasterTransmit(data_to_send[i]);
|
||||
198: 8f 2d mov r24, r15
|
||||
19a: 0e 94 de 00 call 0x1bc ; 0x1bc <SPI_MasterTransmit>
|
||||
//PORTE |= (1 << PORTE1); // STATUS âêë
|
||||
|
||||
if ((PINC)&(1<<PORTC3)) { // STM ãîòîâ ê ïðèåìó
|
||||
PORTE |= (1 << PORTE1); // STATUS âêë
|
||||
_delay_ms(1000);
|
||||
for (int i = 0; i < 12; i++) {
|
||||
19e: 0c 15 cp r16, r12
|
||||
1a0: 1d 05 cpc r17, r13
|
||||
1a2: a1 f7 brne .-24 ; 0x18c <main+0x6e>
|
||||
USART_Transmit(data_to_send[i]);
|
||||
SPI_MasterTransmit(data_to_send[i]);
|
||||
}
|
||||
PORTE &= ~(1 << PORTE1); // STATUS âûêë
|
||||
1a4: 71 98 cbi 0x0e, 1 ; 14
|
||||
1a6: e1 cf rjmp .-62 ; 0x16a <main+0x4c>
|
||||
|
||||
000001a8 <SPI_MasterInit>:
|
||||
*/
|
||||
#include "spi.h"
|
||||
|
||||
void SPI_MasterInit(void) {
|
||||
// Íàñòðîéêà ïèíà SS (PB2) êàê âûõîäà
|
||||
DDRE |= (1 << PORTE2);
|
||||
1a8: 6a 9a sbi 0x0d, 2 ; 13
|
||||
|
||||
// Óñòàíîâêà SS â âûñîêîå ñîñòîÿíèå (íåàêòèâíûé)
|
||||
PORTE |= (1 << PORTE2);
|
||||
1aa: 72 9a sbi 0x0e, 2 ; 14
|
||||
/* Set MOSI, SS and SCK output */
|
||||
DDRE |= (1 << MOSI);
|
||||
1ac: 6b 9a sbi 0x0d, 3 ; 13
|
||||
DDRC |= (1 << SCK) | (1 << SS);
|
||||
1ae: 87 b1 in r24, 0x07 ; 7
|
||||
1b0: 86 60 ori r24, 0x06 ; 6
|
||||
1b2: 87 b9 out 0x07, r24 ; 7
|
||||
|
||||
/* Enable SPI, Master */
|
||||
SPCR1 = (1 << SPE1) | (1 << MSTR1);
|
||||
1b4: 80 e5 ldi r24, 0x50 ; 80
|
||||
1b6: 80 93 ac 00 sts 0x00AC, r24 ; 0x8000ac <__TEXT_REGION_LENGTH__+0x7f80ac>
|
||||
1ba: 08 95 ret
|
||||
|
||||
000001bc <SPI_MasterTransmit>:
|
||||
}
|
||||
|
||||
void SPI_MasterTransmit(uint8_t data) {
|
||||
PORTC &= ~(1 << PORTC2); // íà÷àëî ïåðåäà÷è - íèçêèé óðîâåíü
|
||||
1bc: 42 98 cbi 0x08, 2 ; 8
|
||||
SPDR1 = data;
|
||||
1be: 80 93 ae 00 sts 0x00AE, r24 ; 0x8000ae <__TEXT_REGION_LENGTH__+0x7f80ae>
|
||||
while(!(SPSR1 & (1<<SPIF1))) {
|
||||
1c2: 80 91 ad 00 lds r24, 0x00AD ; 0x8000ad <__TEXT_REGION_LENGTH__+0x7f80ad>
|
||||
1c6: 88 23 and r24, r24
|
||||
1c8: 84 f0 brlt .+32 ; 0x1ea <SPI_MasterTransmit+0x2e>
|
||||
1ca: ed ea ldi r30, 0xAD ; 173
|
||||
1cc: f0 e0 ldi r31, 0x00 ; 0
|
||||
PORTE |= (1 << PORTE1); // STATUS âêë
|
||||
1ce: 71 9a sbi 0x0e, 1 ; 14
|
||||
1d0: 2f ef ldi r18, 0xFF ; 255
|
||||
1d2: 81 ee ldi r24, 0xE1 ; 225
|
||||
1d4: 94 e0 ldi r25, 0x04 ; 4
|
||||
1d6: 21 50 subi r18, 0x01 ; 1
|
||||
1d8: 80 40 sbci r24, 0x00 ; 0
|
||||
1da: 90 40 sbci r25, 0x00 ; 0
|
||||
1dc: e1 f7 brne .-8 ; 0x1d6 <SPI_MasterTransmit+0x1a>
|
||||
1de: 00 c0 rjmp .+0 ; 0x1e0 <SPI_MasterTransmit+0x24>
|
||||
1e0: 00 00 nop
|
||||
_delay_ms(100);
|
||||
PORTE &= ~(1 << PORTE1); // STATUS âûêë
|
||||
1e2: 71 98 cbi 0x0e, 1 ; 14
|
||||
}
|
||||
|
||||
void SPI_MasterTransmit(uint8_t data) {
|
||||
PORTC &= ~(1 << PORTC2); // íà÷àëî ïåðåäà÷è - íèçêèé óðîâåíü
|
||||
SPDR1 = data;
|
||||
while(!(SPSR1 & (1<<SPIF1))) {
|
||||
1e4: 80 81 ld r24, Z
|
||||
1e6: 88 23 and r24, r24
|
||||
1e8: 94 f7 brge .-28 ; 0x1ce <SPI_MasterTransmit+0x12>
|
||||
PORTE |= (1 << PORTE1); // STATUS âêë
|
||||
_delay_ms(100);
|
||||
PORTE &= ~(1 << PORTE1); // STATUS âûêë
|
||||
}
|
||||
PORTC |= (1 << PORTC2); // êîíåö ïåðåäà÷è - âûñîêèé óðîâåíü
|
||||
1ea: 42 9a sbi 0x08, 2 ; 8
|
||||
1ec: 08 95 ret
|
||||
|
||||
000001ee <USART_Init>:
|
||||
|
||||
#include "usart0.h"
|
||||
|
||||
void USART_Init (uint16_t speed) {
|
||||
// Ñò. è ìë. ñêîðîñòü
|
||||
UBRR0H = 0;
|
||||
1ee: 10 92 c5 00 sts 0x00C5, r1 ; 0x8000c5 <__TEXT_REGION_LENGTH__+0x7f80c5>
|
||||
UBRR0L = (uint8_t)(speed);
|
||||
1f2: 80 93 c4 00 sts 0x00C4, r24 ; 0x8000c4 <__TEXT_REGION_LENGTH__+0x7f80c4>
|
||||
// Ïðåðûâàíèÿ ïðè ïðèåìå, âêë ïðèåì/ïåðåäà÷à
|
||||
UCSR0B = (1 << RXEN0) | (1 << TXEN0);
|
||||
1f6: 88 e1 ldi r24, 0x18 ; 24
|
||||
1f8: 80 93 c1 00 sts 0x00C1, r24 ; 0x8000c1 <__TEXT_REGION_LENGTH__+0x7f80c1>
|
||||
// 8 áèò äàííûõ, 2 ñòîï-áèòà
|
||||
UCSR0C = (1<<USBS0) | (3<<UCSZ00);
|
||||
1fc: 8e e0 ldi r24, 0x0E ; 14
|
||||
1fe: 80 93 c2 00 sts 0x00C2, r24 ; 0x8000c2 <__TEXT_REGION_LENGTH__+0x7f80c2>
|
||||
202: 08 95 ret
|
||||
|
||||
00000204 <USART_Transmit>:
|
||||
}
|
||||
|
||||
void USART_Transmit (uint8_t data) {
|
||||
while (!(UCSR0A & (1<<UDRE0))); // Îæèäàíèå êîíöà ïåðåäà÷è
|
||||
204: e0 ec ldi r30, 0xC0 ; 192
|
||||
206: f0 e0 ldi r31, 0x00 ; 0
|
||||
208: 90 81 ld r25, Z
|
||||
20a: 95 ff sbrs r25, 5
|
||||
20c: fd cf rjmp .-6 ; 0x208 <USART_Transmit+0x4>
|
||||
UDR0 = data; // Íà÷àëî ïåðåäà÷è
|
||||
20e: 80 93 c6 00 sts 0x00C6, r24 ; 0x8000c6 <__TEXT_REGION_LENGTH__+0x7f80c6>
|
||||
212: 08 95 ret
|
||||
|
||||
00000214 <_exit>:
|
||||
214: f8 94 cli
|
||||
|
||||
00000216 <__stop_program>:
|
||||
216: ff cf rjmp .-2 ; 0x216 <__stop_program>
|
||||
@ -1,549 +0,0 @@
|
||||
Archive member included to satisfy reference by file (symbol)
|
||||
|
||||
c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/avr5\libgcc.a(_exit.o)
|
||||
C:/Program Files (x86)/Atmel/Studio/7.0/Packs/Atmel/ATmega_DFP/2.0.401/gcc/dev/atmega328pb/avr5/crtatmega328pb.o (exit)
|
||||
c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/avr5\libgcc.a(_copy_data.o)
|
||||
main.o (__do_copy_data)
|
||||
c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/avr5\libgcc.a(_clear_bss.o)
|
||||
main.o (__do_clear_bss)
|
||||
|
||||
Discarded input sections
|
||||
|
||||
.data 0x00000000 0x0 C:/Program Files (x86)/Atmel/Studio/7.0/Packs/Atmel/ATmega_DFP/2.0.401/gcc/dev/atmega328pb/avr5/crtatmega328pb.o
|
||||
.bss 0x00000000 0x0 C:/Program Files (x86)/Atmel/Studio/7.0/Packs/Atmel/ATmega_DFP/2.0.401/gcc/dev/atmega328pb/avr5/crtatmega328pb.o
|
||||
.text 0x00000000 0x0 delay.o
|
||||
.data 0x00000000 0x0 delay.o
|
||||
.bss 0x00000000 0x0 delay.o
|
||||
.text.delay8 0x00000000 0xa delay.o
|
||||
.text.delay16 0x00000000 0xe delay.o
|
||||
.text.init_PUTR
|
||||
0x00000000 0x6 delay.o
|
||||
.text.PUTR 0x00000000 0x94 delay.o
|
||||
.debug_info 0x00000000 0x19a delay.o
|
||||
.debug_abbrev 0x00000000 0xf1 delay.o
|
||||
.debug_loc 0x00000000 0x112 delay.o
|
||||
.debug_aranges
|
||||
0x00000000 0x38 delay.o
|
||||
.debug_ranges 0x00000000 0x28 delay.o
|
||||
.debug_line 0x00000000 0x148 delay.o
|
||||
.debug_str 0x00000000 0x1a4 delay.o
|
||||
.comment 0x00000000 0x31 delay.o
|
||||
.debug_frame 0x00000000 0x78 delay.o
|
||||
.text 0x00000000 0x0 main.o
|
||||
.data 0x00000000 0x0 main.o
|
||||
.bss 0x00000000 0x0 main.o
|
||||
.bss.bytes 0x00000000 0x2 main.o
|
||||
.text 0x00000000 0x0 spi.o
|
||||
.data 0x00000000 0x0 spi.o
|
||||
.bss 0x00000000 0x0 spi.o
|
||||
.text 0x00000000 0x0 usart0.o
|
||||
.data 0x00000000 0x0 usart0.o
|
||||
.bss 0x00000000 0x0 usart0.o
|
||||
.text.USART_Receive
|
||||
0x00000000 0x10 usart0.o
|
||||
.text.USART_DataAvailable
|
||||
0x00000000 0xc usart0.o
|
||||
.text 0x00000000 0x0 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/avr5\libgcc.a(_exit.o)
|
||||
.data 0x00000000 0x0 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/avr5\libgcc.a(_exit.o)
|
||||
.bss 0x00000000 0x0 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/avr5\libgcc.a(_exit.o)
|
||||
.text.libgcc.mul
|
||||
0x00000000 0x0 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/avr5\libgcc.a(_exit.o)
|
||||
.text.libgcc.div
|
||||
0x00000000 0x0 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/avr5\libgcc.a(_exit.o)
|
||||
.text.libgcc 0x00000000 0x0 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/avr5\libgcc.a(_exit.o)
|
||||
.text.libgcc.prologue
|
||||
0x00000000 0x0 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/avr5\libgcc.a(_exit.o)
|
||||
.text.libgcc.builtins
|
||||
0x00000000 0x0 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/avr5\libgcc.a(_exit.o)
|
||||
.text.libgcc.fmul
|
||||
0x00000000 0x0 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/avr5\libgcc.a(_exit.o)
|
||||
.text.libgcc.fixed
|
||||
0x00000000 0x0 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/avr5\libgcc.a(_exit.o)
|
||||
.text 0x00000000 0x0 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/avr5\libgcc.a(_copy_data.o)
|
||||
.data 0x00000000 0x0 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/avr5\libgcc.a(_copy_data.o)
|
||||
.bss 0x00000000 0x0 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/avr5\libgcc.a(_copy_data.o)
|
||||
.text.libgcc.mul
|
||||
0x00000000 0x0 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/avr5\libgcc.a(_copy_data.o)
|
||||
.text.libgcc.div
|
||||
0x00000000 0x0 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/avr5\libgcc.a(_copy_data.o)
|
||||
.text.libgcc 0x00000000 0x0 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/avr5\libgcc.a(_copy_data.o)
|
||||
.text.libgcc.prologue
|
||||
0x00000000 0x0 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/avr5\libgcc.a(_copy_data.o)
|
||||
.text.libgcc.builtins
|
||||
0x00000000 0x0 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/avr5\libgcc.a(_copy_data.o)
|
||||
.text.libgcc.fmul
|
||||
0x00000000 0x0 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/avr5\libgcc.a(_copy_data.o)
|
||||
.text.libgcc.fixed
|
||||
0x00000000 0x0 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/avr5\libgcc.a(_copy_data.o)
|
||||
.text 0x00000000 0x0 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/avr5\libgcc.a(_clear_bss.o)
|
||||
.data 0x00000000 0x0 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/avr5\libgcc.a(_clear_bss.o)
|
||||
.bss 0x00000000 0x0 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/avr5\libgcc.a(_clear_bss.o)
|
||||
.text.libgcc.mul
|
||||
0x00000000 0x0 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/avr5\libgcc.a(_clear_bss.o)
|
||||
.text.libgcc.div
|
||||
0x00000000 0x0 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/avr5\libgcc.a(_clear_bss.o)
|
||||
.text.libgcc 0x00000000 0x0 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/avr5\libgcc.a(_clear_bss.o)
|
||||
.text.libgcc.prologue
|
||||
0x00000000 0x0 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/avr5\libgcc.a(_clear_bss.o)
|
||||
.text.libgcc.builtins
|
||||
0x00000000 0x0 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/avr5\libgcc.a(_clear_bss.o)
|
||||
.text.libgcc.fmul
|
||||
0x00000000 0x0 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/avr5\libgcc.a(_clear_bss.o)
|
||||
.text.libgcc.fixed
|
||||
0x00000000 0x0 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/avr5\libgcc.a(_clear_bss.o)
|
||||
|
||||
Memory Configuration
|
||||
|
||||
Name Origin Length Attributes
|
||||
text 0x00000000 0x00008000 xr
|
||||
data 0x00800100 0x00000800 rw !x
|
||||
eeprom 0x00810000 0x00000400 rw !x
|
||||
fuse 0x00820000 0x00000003 rw !x
|
||||
lock 0x00830000 0x00000400 rw !x
|
||||
signature 0x00840000 0x00000400 rw !x
|
||||
user_signatures 0x00850000 0x00000400 rw !x
|
||||
*default* 0x00000000 0xffffffff
|
||||
|
||||
Linker script and memory map
|
||||
|
||||
Address of section .data set to 0x800100
|
||||
LOAD C:/Program Files (x86)/Atmel/Studio/7.0/Packs/Atmel/ATmega_DFP/2.0.401/gcc/dev/atmega328pb/avr5/crtatmega328pb.o
|
||||
LOAD delay.o
|
||||
LOAD main.o
|
||||
LOAD spi.o
|
||||
LOAD usart0.o
|
||||
START GROUP
|
||||
LOAD c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/../../../../avr/lib/avr5\libm.a
|
||||
END GROUP
|
||||
START GROUP
|
||||
LOAD c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/avr5\libgcc.a
|
||||
LOAD c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/../../../../avr/lib/avr5\libm.a
|
||||
LOAD c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/../../../../avr/lib/avr5\libc.a
|
||||
LOAD C:/Program Files (x86)/Atmel/Studio/7.0/Packs/Atmel/ATmega_DFP/2.0.401/gcc/dev/atmega328pb/avr5\libatmega328pb.a
|
||||
END GROUP
|
||||
[0x00000000] __TEXT_REGION_ORIGIN__ = DEFINED (__TEXT_REGION_ORIGIN__)?__TEXT_REGION_ORIGIN__:0x0
|
||||
[0x00800100] __DATA_REGION_ORIGIN__ = DEFINED (__DATA_REGION_ORIGIN__)?__DATA_REGION_ORIGIN__:0x800060
|
||||
[0x00008000] __TEXT_REGION_LENGTH__ = DEFINED (__TEXT_REGION_LENGTH__)?__TEXT_REGION_LENGTH__:0x20000
|
||||
[0x00000800] __DATA_REGION_LENGTH__ = DEFINED (__DATA_REGION_LENGTH__)?__DATA_REGION_LENGTH__:0xffa0
|
||||
[0x00000400] __EEPROM_REGION_LENGTH__ = DEFINED (__EEPROM_REGION_LENGTH__)?__EEPROM_REGION_LENGTH__:0x10000
|
||||
[0x00000003] __FUSE_REGION_LENGTH__ = DEFINED (__FUSE_REGION_LENGTH__)?__FUSE_REGION_LENGTH__:0x400
|
||||
0x00000400 __LOCK_REGION_LENGTH__ = DEFINED (__LOCK_REGION_LENGTH__)?__LOCK_REGION_LENGTH__:0x400
|
||||
0x00000400 __SIGNATURE_REGION_LENGTH__ = DEFINED (__SIGNATURE_REGION_LENGTH__)?__SIGNATURE_REGION_LENGTH__:0x400
|
||||
0x00000400 __USER_SIGNATURE_REGION_LENGTH__ = DEFINED (__USER_SIGNATURE_REGION_LENGTH__)?__USER_SIGNATURE_REGION_LENGTH__:0x400
|
||||
|
||||
.hash
|
||||
*(.hash)
|
||||
|
||||
.dynsym
|
||||
*(.dynsym)
|
||||
|
||||
.dynstr
|
||||
*(.dynstr)
|
||||
|
||||
.gnu.version
|
||||
*(.gnu.version)
|
||||
|
||||
.gnu.version_d
|
||||
*(.gnu.version_d)
|
||||
|
||||
.gnu.version_r
|
||||
*(.gnu.version_r)
|
||||
|
||||
.rel.init
|
||||
*(.rel.init)
|
||||
|
||||
.rela.init
|
||||
*(.rela.init)
|
||||
|
||||
.rel.text
|
||||
*(.rel.text)
|
||||
*(.rel.text.*)
|
||||
*(.rel.gnu.linkonce.t*)
|
||||
|
||||
.rela.text
|
||||
*(.rela.text)
|
||||
*(.rela.text.*)
|
||||
*(.rela.gnu.linkonce.t*)
|
||||
|
||||
.rel.fini
|
||||
*(.rel.fini)
|
||||
|
||||
.rela.fini
|
||||
*(.rela.fini)
|
||||
|
||||
.rel.rodata
|
||||
*(.rel.rodata)
|
||||
*(.rel.rodata.*)
|
||||
*(.rel.gnu.linkonce.r*)
|
||||
|
||||
.rela.rodata
|
||||
*(.rela.rodata)
|
||||
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*(.text.*)
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0x000000f2 0x2c main.o
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|
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0x0000011e main
|
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|
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0x000001a8 0x14 spi.o
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0x000001bc 0x32 spi.o
|
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0x000001ee USART_Init
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0x00000204 0x10 usart0.o
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0x00000204 USART_Transmit
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*(.fini9)
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.fini9 0x00000214 0x0 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/avr5\libgcc.a(_exit.o)
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0x00000214 _exit
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0x00000214 exit
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*(.fini0)
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0x00000218 _etext = .
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.data 0x00800100 0xc load address 0x00000218
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0x00800100 PROVIDE (__data_start, .)
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*(.data)
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*(.data*)
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*(.gnu.linkonce.d*)
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*(.rodata)
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.rodata 0x00800100 0xc main.o
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0x0080010c . = ALIGN (0x2)
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||||
@ -1,163 +0,0 @@
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||||
################################################################################
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||||
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||||
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||||
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||||
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EXECUTABLES :=
|
||||
OUTPUT_FILE_PATH :=
|
||||
OUTPUT_FILE_PATH_AS_ARGS :=
|
||||
AVR_APP_PATH :=$$$AVR_APP_PATH$$$
|
||||
QUOTE := "
|
||||
ADDITIONAL_DEPENDENCIES:=
|
||||
OUTPUT_FILE_DEP:=
|
||||
LIB_DEP:=
|
||||
LINKER_SCRIPT_DEP:=
|
||||
|
||||
# Every subdirectory with source files must be described here
|
||||
SUBDIRS :=
|
||||
|
||||
|
||||
# Add inputs and outputs from these tool invocations to the build variables
|
||||
C_SRCS += \
|
||||
../delay.c \
|
||||
../main.c \
|
||||
../spi.c \
|
||||
../usart0.c
|
||||
|
||||
|
||||
PREPROCESSING_SRCS +=
|
||||
|
||||
|
||||
ASM_SRCS +=
|
||||
|
||||
|
||||
OBJS += \
|
||||
delay.o \
|
||||
main.o \
|
||||
spi.o \
|
||||
usart0.o
|
||||
|
||||
OBJS_AS_ARGS += \
|
||||
delay.o \
|
||||
main.o \
|
||||
spi.o \
|
||||
usart0.o
|
||||
|
||||
C_DEPS += \
|
||||
delay.d \
|
||||
main.d \
|
||||
spi.d \
|
||||
usart0.d
|
||||
|
||||
C_DEPS_AS_ARGS += \
|
||||
delay.d \
|
||||
main.d \
|
||||
spi.d \
|
||||
usart0.d
|
||||
|
||||
OUTPUT_FILE_PATH +=GccApplication1.elf
|
||||
|
||||
OUTPUT_FILE_PATH_AS_ARGS +=GccApplication1.elf
|
||||
|
||||
ADDITIONAL_DEPENDENCIES:=
|
||||
|
||||
OUTPUT_FILE_DEP:= ./makedep.mk
|
||||
|
||||
LIB_DEP+=
|
||||
|
||||
LINKER_SCRIPT_DEP+=
|
||||
|
||||
|
||||
# AVR32/GNU C Compiler
|
||||
./delay.o: .././delay.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: AVR/GNU C Compiler : 5.4.0
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\avr8\avr8-gnu-toolchain\bin\avr-gcc.exe$(QUOTE) -x c -funsigned-char -funsigned-bitfields -DDEBUG -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\Atmel\ATmega_DFP\2.0.401\include" -O1 -ffunction-sections -fdata-sections -fpack-struct -fshort-enums -g2 -Wall -mmcu=atmega328pb -B "C:\Program Files (x86)\Atmel\Studio\7.0\Packs\Atmel\ATmega_DFP\2.0.401\gcc\dev\atmega328pb" -c -std=gnu99 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
./main.o: .././main.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: AVR/GNU C Compiler : 5.4.0
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\avr8\avr8-gnu-toolchain\bin\avr-gcc.exe$(QUOTE) -x c -funsigned-char -funsigned-bitfields -DDEBUG -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\Atmel\ATmega_DFP\2.0.401\include" -O1 -ffunction-sections -fdata-sections -fpack-struct -fshort-enums -g2 -Wall -mmcu=atmega328pb -B "C:\Program Files (x86)\Atmel\Studio\7.0\Packs\Atmel\ATmega_DFP\2.0.401\gcc\dev\atmega328pb" -c -std=gnu99 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
./spi.o: .././spi.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: AVR/GNU C Compiler : 5.4.0
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\avr8\avr8-gnu-toolchain\bin\avr-gcc.exe$(QUOTE) -x c -funsigned-char -funsigned-bitfields -DDEBUG -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\Atmel\ATmega_DFP\2.0.401\include" -O1 -ffunction-sections -fdata-sections -fpack-struct -fshort-enums -g2 -Wall -mmcu=atmega328pb -B "C:\Program Files (x86)\Atmel\Studio\7.0\Packs\Atmel\ATmega_DFP\2.0.401\gcc\dev\atmega328pb" -c -std=gnu99 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
./usart0.o: .././usart0.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: AVR/GNU C Compiler : 5.4.0
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\avr8\avr8-gnu-toolchain\bin\avr-gcc.exe$(QUOTE) -x c -funsigned-char -funsigned-bitfields -DDEBUG -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\Atmel\ATmega_DFP\2.0.401\include" -O1 -ffunction-sections -fdata-sections -fpack-struct -fshort-enums -g2 -Wall -mmcu=atmega328pb -B "C:\Program Files (x86)\Atmel\Studio\7.0\Packs\Atmel\ATmega_DFP\2.0.401\gcc\dev\atmega328pb" -c -std=gnu99 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
# AVR32/GNU Preprocessing Assembler
|
||||
|
||||
|
||||
|
||||
# AVR32/GNU Assembler
|
||||
|
||||
|
||||
|
||||
|
||||
ifneq ($(MAKECMDGOALS),clean)
|
||||
ifneq ($(strip $(C_DEPS)),)
|
||||
-include $(C_DEPS)
|
||||
endif
|
||||
endif
|
||||
|
||||
# Add inputs and outputs from these tool invocations to the build variables
|
||||
|
||||
# All Target
|
||||
all: $(OUTPUT_FILE_PATH) $(ADDITIONAL_DEPENDENCIES)
|
||||
|
||||
$(OUTPUT_FILE_PATH): $(OBJS) $(USER_OBJS) $(OUTPUT_FILE_DEP) $(LIB_DEP) $(LINKER_SCRIPT_DEP)
|
||||
@echo Building target: $@
|
||||
@echo Invoking: AVR/GNU Linker : 5.4.0
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\avr8\avr8-gnu-toolchain\bin\avr-gcc.exe$(QUOTE) -o$(OUTPUT_FILE_PATH_AS_ARGS) $(OBJS_AS_ARGS) $(USER_OBJS) $(LIBS) -Wl,-Map="GccApplication1.map" -Wl,--start-group -Wl,-lm -Wl,--end-group -Wl,--gc-sections -mmcu=atmega328pb -B "C:\Program Files (x86)\Atmel\Studio\7.0\Packs\Atmel\ATmega_DFP\2.0.401\gcc\dev\atmega328pb"
|
||||
@echo Finished building target: $@
|
||||
"C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\avr8\avr8-gnu-toolchain\bin\avr-objcopy.exe" -O ihex -R .eeprom -R .fuse -R .lock -R .signature -R .user_signatures "GccApplication1.elf" "GccApplication1.hex"
|
||||
"C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\avr8\avr8-gnu-toolchain\bin\avr-objcopy.exe" -j .eeprom --set-section-flags=.eeprom=alloc,load --change-section-lma .eeprom=0 --no-change-warnings -O ihex "GccApplication1.elf" "GccApplication1.eep" || exit 0
|
||||
"C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\avr8\avr8-gnu-toolchain\bin\avr-objdump.exe" -h -S "GccApplication1.elf" > "GccApplication1.lss"
|
||||
"C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\avr8\avr8-gnu-toolchain\bin\avr-objcopy.exe" -O srec -R .eeprom -R .fuse -R .lock -R .signature -R .user_signatures "GccApplication1.elf" "GccApplication1.srec"
|
||||
"C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\avr8\avr8-gnu-toolchain\bin\avr-size.exe" "GccApplication1.elf"
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
# Other Targets
|
||||
clean:
|
||||
-$(RM) $(OBJS_AS_ARGS) $(EXECUTABLES)
|
||||
-$(RM) $(C_DEPS_AS_ARGS)
|
||||
rm -rf "GccApplication1.elf" "GccApplication1.a" "GccApplication1.hex" "GccApplication1.lss" "GccApplication1.eep" "GccApplication1.map" "GccApplication1.srec" "GccApplication1.usersignatures"
|
||||
|
||||
@ -1,39 +0,0 @@
|
||||
delay.d delay.o: .././delay.c .././delay.h \
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\io.h \
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sfr_defs.h \
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\inttypes.h \
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdint.h \
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdint.h \
|
||||
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\Atmel\ATmega_DFP\2.0.401\include/avr/iom328pb.h \
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\portpins.h \
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\common.h \
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\version.h \
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\fuse.h \
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\lock.h \
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\cpufunc.h
|
||||
|
||||
.././delay.h:
|
||||
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\io.h:
|
||||
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sfr_defs.h:
|
||||
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\inttypes.h:
|
||||
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdint.h:
|
||||
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdint.h:
|
||||
|
||||
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\Atmel\ATmega_DFP\2.0.401\include/avr/iom328pb.h:
|
||||
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\portpins.h:
|
||||
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\common.h:
|
||||
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\version.h:
|
||||
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\fuse.h:
|
||||
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\lock.h:
|
||||
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\cpufunc.h:
|
||||
Binary file not shown.
@ -1,65 +0,0 @@
|
||||
main.d main.o: .././main.c .././main.h \
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\io.h \
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sfr_defs.h \
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\inttypes.h \
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdint.h \
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdint.h \
|
||||
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\Atmel\ATmega_DFP\2.0.401\include/avr/iom328pb.h \
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\portpins.h \
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\common.h \
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\version.h \
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\fuse.h \
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\lock.h \
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\interrupt.h \
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdio.h \
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdarg.h \
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stddef.h \
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdlib.h \
|
||||
.././usart0.h .././spi.h \
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\util\delay.h \
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\util\delay_basic.h \
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\math.h
|
||||
|
||||
.././main.h:
|
||||
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\io.h:
|
||||
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sfr_defs.h:
|
||||
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\inttypes.h:
|
||||
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdint.h:
|
||||
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdint.h:
|
||||
|
||||
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\Atmel\ATmega_DFP\2.0.401\include/avr/iom328pb.h:
|
||||
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\portpins.h:
|
||||
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\common.h:
|
||||
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\version.h:
|
||||
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\fuse.h:
|
||||
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\lock.h:
|
||||
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\interrupt.h:
|
||||
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdio.h:
|
||||
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdarg.h:
|
||||
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stddef.h:
|
||||
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdlib.h:
|
||||
|
||||
.././usart0.h:
|
||||
|
||||
.././spi.h:
|
||||
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\util\delay.h:
|
||||
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\util\delay_basic.h:
|
||||
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\math.h:
|
||||
Binary file not shown.
@ -1,65 +0,0 @@
|
||||
spi.d spi.o: .././spi.c .././spi.h .././main.h \
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\io.h \
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sfr_defs.h \
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\inttypes.h \
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdint.h \
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdint.h \
|
||||
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\Atmel\ATmega_DFP\2.0.401\include/avr/iom328pb.h \
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\portpins.h \
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\common.h \
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\version.h \
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\fuse.h \
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\lock.h \
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\interrupt.h \
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdio.h \
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdarg.h \
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stddef.h \
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdlib.h \
|
||||
.././usart0.h \
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\util\delay.h \
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\util\delay_basic.h \
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\math.h
|
||||
|
||||
.././spi.h:
|
||||
|
||||
.././main.h:
|
||||
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\io.h:
|
||||
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sfr_defs.h:
|
||||
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\inttypes.h:
|
||||
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdint.h:
|
||||
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdint.h:
|
||||
|
||||
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\Atmel\ATmega_DFP\2.0.401\include/avr/iom328pb.h:
|
||||
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\portpins.h:
|
||||
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\common.h:
|
||||
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\version.h:
|
||||
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\fuse.h:
|
||||
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\lock.h:
|
||||
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\interrupt.h:
|
||||
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdio.h:
|
||||
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdarg.h:
|
||||
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stddef.h:
|
||||
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdlib.h:
|
||||
|
||||
.././usart0.h:
|
||||
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\util\delay.h:
|
||||
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\util\delay_basic.h:
|
||||
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\math.h:
|
||||
Binary file not shown.
@ -1,65 +0,0 @@
|
||||
usart0.d usart0.o: .././usart0.c .././usart0.h .././main.h \
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\io.h \
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sfr_defs.h \
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\inttypes.h \
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdint.h \
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdint.h \
|
||||
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\Atmel\ATmega_DFP\2.0.401\include/avr/iom328pb.h \
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\portpins.h \
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\common.h \
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\version.h \
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\fuse.h \
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\lock.h \
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\interrupt.h \
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdio.h \
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdarg.h \
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stddef.h \
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdlib.h \
|
||||
.././spi.h \
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\util\delay.h \
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\util\delay_basic.h \
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\math.h
|
||||
|
||||
.././usart0.h:
|
||||
|
||||
.././main.h:
|
||||
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\io.h:
|
||||
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sfr_defs.h:
|
||||
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\inttypes.h:
|
||||
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdint.h:
|
||||
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdint.h:
|
||||
|
||||
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\Atmel\ATmega_DFP\2.0.401\include/avr/iom328pb.h:
|
||||
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\portpins.h:
|
||||
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\common.h:
|
||||
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\version.h:
|
||||
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\fuse.h:
|
||||
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\lock.h:
|
||||
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\interrupt.h:
|
||||
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdio.h:
|
||||
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdarg.h:
|
||||
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stddef.h:
|
||||
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdlib.h:
|
||||
|
||||
.././spi.h:
|
||||
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\util\delay.h:
|
||||
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\util\delay_basic.h:
|
||||
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\math.h:
|
||||
Binary file not shown.
@ -1,177 +0,0 @@
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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|
||||
<Import Project="$(AVRSTUDIO_EXE_PATH)\\Vs\\Compiler.targets" />
|
||||
</Project>
|
||||
@ -1,80 +0,0 @@
|
||||
// delay.c
|
||||
#include "delay.h"
|
||||
// íåîïòèìèçèðóåìûå êîìïèëÿòîðîì ôóíêöèè ïðîöåññîðíûõ çàäåðæåê
|
||||
void delay8(uint8_t ticks)
|
||||
{
|
||||
/*
|
||||
àðõèòåêòðóðà AVR8 (2560, 328pb), ÷àñòîòà = 16 MHz, ïåðèîä 62.5 ns
|
||||
èñïûòàíî íà êîäå c çàìåðîì îñöèëëîãðàôîì
|
||||
PORTA |= (1 << 1);
|
||||
delay8(val);
|
||||
PORTA &= ~(1 << 1);
|
||||
ïîëó÷åííàÿ ôîðìóëà çàäåðæêè (ìêñ) = 0,191 * ticks + 1,227, åñëè ticks > 0
|
||||
0 ticks = 1,38 ìêñ
|
||||
*/
|
||||
__asm__ volatile (
|
||||
"cpc %A0,__zero_reg__ \n\t" \
|
||||
"breq L_Exit_%= \n\t" \
|
||||
"L_LOOP_%=: \n\t" \
|
||||
"subi %A0,1 \n\t" \
|
||||
"brne L_LOOP_%= \n\t" \
|
||||
"L_Exit_%=: \n\t" \
|
||||
: "=w" (ticks) \
|
||||
: "0" (ticks) \
|
||||
); \
|
||||
return;
|
||||
}
|
||||
|
||||
void delay16(uint16_t ticks)
|
||||
{
|
||||
/*
|
||||
àðõèòåêòðóðà AVR8 (2560, 328pb), ÷àñòîòà = 16 MHz, ïåðèîä 62.5 ns
|
||||
èñïûòàíî íà êîäå c çàìåðîì îñöèëëîãðàôîì
|
||||
PORTA |= (1 << 1);
|
||||
delay16(val);
|
||||
PORTA &= ~(1 << 1);
|
||||
ïîëó÷åííàÿ ôîðìóëà çàäåðæêè (ìêñ) = 0,250 * ticks + 1,294 , åñëè ticks > 0
|
||||
0 ticks = 1,44 ìêñ
|
||||
*/
|
||||
__asm__ volatile (
|
||||
"cp %A0,__zero_reg__ \n\t" \
|
||||
"cpc %B0,__zero_reg__ \n\t" \
|
||||
"breq L_Exit_%= \n\t" \
|
||||
"L_LOOP_%=: \n\t" \
|
||||
"subi %A0,1 \n\t" \
|
||||
"sbci %B0,0 \n\t" \
|
||||
"brne L_LOOP_%= \n\t" \
|
||||
"L_Exit_%=: \n\t" \
|
||||
: "=w" (ticks) \
|
||||
: "0" (ticks) \
|
||||
); \
|
||||
return;
|
||||
}
|
||||
|
||||
void init_PUTR()
|
||||
{
|
||||
DDRC |= 1 << PORTC0;
|
||||
PORTC |= 1 << PORTC0;
|
||||
}
|
||||
|
||||
void PUTR(uint8_t byte)
|
||||
{
|
||||
#define BIT_TICK 35 // 115200
|
||||
uint8_t bit[8];
|
||||
for(uint8_t i = 0; i < 8; i++)
|
||||
bit[i] = (byte >> i) & 0x01;
|
||||
|
||||
// transmittion
|
||||
PORTC &= ~(1 << PORTC0);
|
||||
delay8(BIT_TICK);
|
||||
for(uint8_t i = 0; i < 8; i++)
|
||||
{
|
||||
if(bit[i] != 0)
|
||||
PORTC |= 1 << PORTC0;
|
||||
else
|
||||
PORTC &= ~(1 << PORTC0);
|
||||
delay8(BIT_TICK);
|
||||
}
|
||||
PORTC |= 1 << PORTC0;
|
||||
delay8(BIT_TICK);
|
||||
}
|
||||
@ -1,14 +0,0 @@
|
||||
// delay.h
|
||||
|
||||
#ifndef DELAY_H_
|
||||
#define DELAY_H_
|
||||
|
||||
#include <avr/io.h>
|
||||
#include <avr/cpufunc.h>
|
||||
|
||||
void delay8(uint8_t);
|
||||
void delay16(uint16_t);
|
||||
void init_PUTR();
|
||||
void PUTR(uint8_t);
|
||||
|
||||
#endif
|
||||
@ -1,83 +0,0 @@
|
||||
/*
|
||||
* GccApplication1.c
|
||||
*
|
||||
* Created: 11.10.2023 16:40:59
|
||||
* Author : Katya
|
||||
*/
|
||||
#include "main.h"
|
||||
|
||||
|
||||
int bytes = 0;
|
||||
|
||||
//ISR (USART0_RX_vect) {
|
||||
//data_to_send[bytes] = UDR0;
|
||||
//bytes++;
|
||||
//PORTE = 0;
|
||||
//}
|
||||
|
||||
int main(void)
|
||||
{
|
||||
uint8_t data_to_send[] = {0x01, 0x4E, 0x20, 0x28, 0x01, 0x00, 0x01, 0x9C, 0x40, 0x28, 0x01, 0x01};
|
||||
DDRD = 3; // USART PD0, PD1
|
||||
PORTD = 3;
|
||||
///////////////////////////////
|
||||
//STM NRST
|
||||
DDRC = 0;
|
||||
PORTC = 0;
|
||||
///////////////////////////////
|
||||
DDRE |= (1 << PORTE1);
|
||||
DDRE &= ~(1 << PORTE2);
|
||||
PORTE &= ~(1 << PORTE2);
|
||||
//PORTE = 2;
|
||||
|
||||
USART_Init(8); // óñòàíîâêà ñêîðîñòè 115200: (16 000 000 / (16 * 115 200) ) - 1, U2X = 0
|
||||
sei();
|
||||
|
||||
// -----SPI-----
|
||||
SPI_MasterInit();
|
||||
//_delay_ms(100);
|
||||
//PORTE |= (1 << PORTE1);
|
||||
//_delay_ms(100);
|
||||
//PORTE &= ~(1 << PORTE1); // STATUS âûêë
|
||||
|
||||
while (1)
|
||||
{
|
||||
//if ((PINC)&(1<<PORTC3)) {
|
||||
//PORTE |= (1 << PORTE1); // STATUS âêë
|
||||
//}
|
||||
|
||||
//for (uint8_t i = 0; i < 12; i++) {
|
||||
//data_to_send[i] = USART_Receive();
|
||||
//}
|
||||
//PORTE &= ~(1 << PORTE1); // STATUS âûêë
|
||||
//for (uint8_t i = 0; i < 12; i++) {
|
||||
//USART_Transmit(data_to_send[i]);
|
||||
//}
|
||||
// $05$4E$20$28$01$00$03$9C$40$28$01$01
|
||||
STMReset();
|
||||
|
||||
//PORTE |= (1 << PORTE1);
|
||||
//_delay_ms(100);
|
||||
//PORTE &= ~(1 << PORTE1); // STATUS âûêë
|
||||
//
|
||||
//PORTE |= (1 << PORTE1); // STATUS âêë
|
||||
|
||||
if ((PINC)&(1<<PORTC3)) { // STM ãîòîâ ê ïðèåìó
|
||||
PORTE |= (1 << PORTE1); // STATUS âêë
|
||||
_delay_ms(1000);
|
||||
for (int i = 0; i < 12; i++) {
|
||||
USART_Transmit(data_to_send[i]);
|
||||
SPI_MasterTransmit(data_to_send[i]);
|
||||
}
|
||||
PORTE &= ~(1 << PORTE1); // STATUS âûêë
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void STMReset() {
|
||||
DDRC |= (1 << PINC4);
|
||||
PORTC &= ~(1 << PINC4);
|
||||
_delay_ms(100);
|
||||
DDRC &= ~(1 << PINC4);
|
||||
_delay_ms(100);
|
||||
}
|
||||
@ -1,23 +0,0 @@
|
||||
/*
|
||||
* main.h
|
||||
*
|
||||
* Created: 12.10.2023 12:18:13
|
||||
* Author: Katya
|
||||
*/
|
||||
|
||||
#ifndef MAIN_H_
|
||||
#define MAIN_H_
|
||||
|
||||
#define F_CPU 16000000UL
|
||||
|
||||
#include <avr/io.h>
|
||||
#include <avr/interrupt.h>
|
||||
#include <stdio.h>
|
||||
#include <stdlib.h>
|
||||
#include "usart0.h"
|
||||
#include "spi.h"
|
||||
#include <util/delay.h>
|
||||
|
||||
void STMReset();
|
||||
|
||||
#endif /* MAIN_H_ */
|
||||
@ -1,32 +0,0 @@
|
||||
/*
|
||||
* spi.c
|
||||
*
|
||||
* Created: 13.10.2023 11:03:48
|
||||
* Author: Katya
|
||||
*/
|
||||
#include "spi.h"
|
||||
|
||||
void SPI_MasterInit(void) {
|
||||
// Íàñòðîéêà ïèíà SS (PB2) êàê âûõîäà
|
||||
DDRE |= (1 << PORTE2);
|
||||
|
||||
// Óñòàíîâêà SS â âûñîêîå ñîñòîÿíèå (íåàêòèâíûé)
|
||||
PORTE |= (1 << PORTE2);
|
||||
/* Set MOSI, SS and SCK output */
|
||||
DDRE |= (1 << MOSI);
|
||||
DDRC |= (1 << SCK) | (1 << SS);
|
||||
|
||||
/* Enable SPI, Master */
|
||||
SPCR1 = (1 << SPE1) | (1 << MSTR1);
|
||||
}
|
||||
|
||||
void SPI_MasterTransmit(uint8_t data) {
|
||||
PORTC &= ~(1 << PORTC2); // íà÷àëî ïåðåäà÷è - íèçêèé óðîâåíü
|
||||
SPDR1 = data;
|
||||
while(!(SPSR1 & (1<<SPIF1))) {
|
||||
PORTE |= (1 << PORTE1); // STATUS âêë
|
||||
_delay_ms(100);
|
||||
PORTE &= ~(1 << PORTE1); // STATUS âûêë
|
||||
}
|
||||
PORTC |= (1 << PORTC2); // êîíåö ïåðåäà÷è - âûñîêèé óðîâåíü
|
||||
}
|
||||
@ -1,21 +0,0 @@
|
||||
/*
|
||||
* spi.h
|
||||
*
|
||||
* Created: 13.10.2023 11:03:59
|
||||
* Author: Katya
|
||||
*/
|
||||
|
||||
|
||||
#ifndef SPI_H_
|
||||
#define SPI_H_
|
||||
|
||||
#define MOSI DDE3
|
||||
#define SCK DDC1
|
||||
#define SS DDC2
|
||||
|
||||
#include "main.h"
|
||||
|
||||
void SPI_MasterInit (void);
|
||||
void SPI_MasterTransmit(uint8_t data);
|
||||
|
||||
#endif /* SPI_H_ */
|
||||
@ -1,33 +0,0 @@
|
||||
/*
|
||||
* usart0.c
|
||||
*
|
||||
* Created: 12.10.2023 12:18:27
|
||||
* Author: Katya
|
||||
*/
|
||||
|
||||
#include "usart0.h"
|
||||
|
||||
void USART_Init (uint16_t speed) {
|
||||
// Ст. и мл. скорость
|
||||
UBRR0H = 0;
|
||||
UBRR0L = (uint8_t)(speed);
|
||||
// Прерывания при приеме, вкл прием/передача
|
||||
UCSR0B = (1 << RXEN0) | (1 << TXEN0);
|
||||
// 8 бит данных, 2 стоп-бита
|
||||
UCSR0C = (1<<USBS0) | (3<<UCSZ00);
|
||||
}
|
||||
|
||||
void USART_Transmit (uint8_t data) {
|
||||
while (!(UCSR0A & (1<<UDRE0))); // Ожидание конца передачи
|
||||
UDR0 = data; // Начало передачи
|
||||
}
|
||||
|
||||
uint8_t USART_Receive() {
|
||||
while (!(UCSR0A & (1 << RXC0))); // Ожидание конца приема
|
||||
return UDR0; // Принятые данные
|
||||
}
|
||||
|
||||
uint8_t USART_DataAvailable() {
|
||||
// Пришел ли пакет в приемную шину
|
||||
return (UCSR0A & (1 << RXC0)) ? 1 : 0;
|
||||
}
|
||||
@ -1,19 +0,0 @@
|
||||
/*
|
||||
* usart0.h
|
||||
*
|
||||
* Created: 12.10.2023 12:18:41
|
||||
* Author: Katya
|
||||
*/
|
||||
|
||||
|
||||
#ifndef USART0_H_
|
||||
#define USART0_H_
|
||||
|
||||
#include "main.h"
|
||||
|
||||
void USART_Init (uint16_t speed);
|
||||
void USART_Transmit (uint8_t data);
|
||||
uint8_t USART_Receive();
|
||||
uint8_t USART_DataAvailable();
|
||||
|
||||
#endif /* USART0_H_ */
|
||||
@ -0,0 +1,36 @@
|
||||
require("LTEModules/1xGen_Test")
|
||||
require("LTEModules/idiBusFormatter")
|
||||
require("LTEModules/idiBusCommon")
|
||||
|
||||
-- Line 0
|
||||
ibController = IdiBusController{device = "COM1", baudrate = 115200}
|
||||
-- Line 1
|
||||
--ibController = IdiBusController(device = "COM2", baudrate = 115200)
|
||||
|
||||
showIbPacket(StartTest_1xGen{controller = ibController, address = 2})
|
||||
|
||||
------------------------------------------------------------------------------------------------------
|
||||
require("LTEModules/idiBusFormatter")
|
||||
require("LTEModules/idiBusCommon")
|
||||
|
||||
iBController1 = IdiBusController
|
||||
{
|
||||
-- Line 0
|
||||
device="COM1",
|
||||
-- Line 1
|
||||
--device = "COM2",
|
||||
baudrate=115200
|
||||
}
|
||||
exampleRawIbPacket = {
|
||||
address=2,
|
||||
mmps=0x04,
|
||||
dev=0,
|
||||
channel=0,
|
||||
comFunc=0,
|
||||
data=byteArray({0x01, 0x4E, 0x20, 0x28, 0x01, 0x00, 0x01, 0x9C, 0x40, 0x28, 0x01, 0x01})
|
||||
}
|
||||
local answer
|
||||
iBController1:sendMasterMessage(exampleRawIbPacket)
|
||||
answer = iBController1:getBufferAsBytes()
|
||||
Logger:printLine("Answer:")
|
||||
Logger:printLineAsHex(answer); Logger:print("\n")
|
||||
@ -0,0 +1,196 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
|
||||
<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
|
||||
<storageModule moduleId="org.eclipse.cdt.core.settings">
|
||||
<cconfiguration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.945627840">
|
||||
<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.945627840" moduleId="org.eclipse.cdt.core.settings" name="Debug">
|
||||
<externalSettings/>
|
||||
<extensions>
|
||||
<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
|
||||
<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
|
||||
<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
|
||||
<extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
|
||||
<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
|
||||
<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
|
||||
</extensions>
|
||||
</storageModule>
|
||||
<storageModule moduleId="cdtBuildSystem" version="4.0.0">
|
||||
<configuration artifactExtension="elf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" cleanCommand="rm -rf" description="" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.945627840" name="Debug" parent="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug">
|
||||
<folderInfo id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.945627840." name="/" resourcePath="">
|
||||
<toolChain id="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug.2086655996" name="MCU ARM GCC" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug">
|
||||
<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu.351173105" name="MCU" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu" useByScannerDiscovery="true" value="STM32F407VETx" valueType="string"/>
|
||||
<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid.1950043901" name="CPU" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid" useByScannerDiscovery="false" value="0" valueType="string"/>
|
||||
<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid.233599742" name="Core" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid" useByScannerDiscovery="false" value="0" valueType="string"/>
|
||||
<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.1484465521" name="Floating-point unit" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu" useByScannerDiscovery="true" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.value.fpv4-sp-d16" valueType="enumerated"/>
|
||||
<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.820569924" name="Floating-point ABI" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi" useByScannerDiscovery="true" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.value.hard" valueType="enumerated"/>
|
||||
<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board.753975788" name="Board" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board" useByScannerDiscovery="false" value="genericBoard" valueType="string"/>
|
||||
<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.1337544974" name="Defaults" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" useByScannerDiscovery="false" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.6 || Debug || true || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.option.toolchain.value.workspace || STM32F407VETx || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../Core/Inc | ../Drivers/STM32F4xx_HAL_Driver/Inc | ../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy | ../Drivers/CMSIS/Device/ST/STM32F4xx/Include | ../Drivers/CMSIS/Include || || || USE_HAL_DRIVER | STM32F407xx || || Drivers | Core/Startup | Core || || || ${workspace_loc:/${ProjName}/STM32F407VETX_FLASH.ld} || true || NonSecure || || secure_nsclib.o || || None || || || " valueType="string"/>
|
||||
<option id="com.st.stm32cube.ide.mcu.debug.option.cpuclock.1645618949" name="Cpu clock frequence" superClass="com.st.stm32cube.ide.mcu.debug.option.cpuclock" useByScannerDiscovery="false" value="24" valueType="string"/>
|
||||
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<storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/>
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<resource resourceType="PROJECT" workspacePath="/STM_gen"/>
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</configuration>
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<configuration configurationName="Release">
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<resource resourceType="PROJECT" workspacePath="/STM_gen"/>
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File diff suppressed because one or more lines are too long
@ -0,0 +1,32 @@
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<?xml version="1.0" encoding="UTF-8"?>
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<projectDescription>
|
||||
<name>STM_gen</name>
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||||
<comment></comment>
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||||
<projects>
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||||
</projects>
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||||
<buildSpec>
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<buildCommand>
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<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
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<triggers>clean,full,incremental,</triggers>
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<arguments>
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</arguments>
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</buildCommand>
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<buildCommand>
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<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
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||||
<triggers>full,incremental,</triggers>
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<arguments>
|
||||
</arguments>
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</buildCommand>
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||||
</buildSpec>
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||||
<natures>
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<nature>com.st.stm32cube.ide.mcu.MCUProjectNature</nature>
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||||
<nature>org.eclipse.cdt.core.cnature</nature>
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<nature>com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAev2ProjectNature</nature>
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<nature>com.st.stm32cube.ide.mcu.MCUCubeProjectNature</nature>
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<nature>com.st.stm32cube.ide.mcu.MCUAdvancedStructureProjectNature</nature>
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<nature>com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature</nature>
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<nature>com.st.stm32cube.ide.mcu.MCURootProjectNature</nature>
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||||
<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
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||||
<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
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||||
</natures>
|
||||
</projectDescription>
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||||
@ -0,0 +1,3 @@
|
||||
eclipse.preferences.version=1
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svd_custom_file_path=
|
||||
svd_file_path=platform\:/plugin/com.st.stm32cube.ide.mcu.productdb.debug/resources/cmsis/STMicroelectronics_CMSIS_SVD/STM32F407.svd
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||||
@ -0,0 +1,2 @@
|
||||
eclipse.preferences.version=1
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||||
sfrviewstate={"fFavorites"\:{"fLists"\:{}},"fProperties"\:{"fNodeProperties"\:{}}}
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@ -0,0 +1,25 @@
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<?xml version="1.0" encoding="UTF-8" standalone="no"?>
|
||||
<project>
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||||
<configuration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.945627840" name="Debug">
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||||
<extension point="org.eclipse.cdt.core.LanguageSettingsProvider">
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||||
<provider-reference id="org.eclipse.cdt.ui.UserLanguageSettingsProvider" ref="shared-provider"/>
|
||||
<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
|
||||
<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
|
||||
<provider class="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" console="false" env-hash="1860105295515578856" id="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" keep-relative-paths="false" name="MCU ARM GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -E -P -v -dD "${INPUTS}"" prefer-non-shared="true">
|
||||
<language-scope id="org.eclipse.cdt.core.gcc"/>
|
||||
<language-scope id="org.eclipse.cdt.core.g++"/>
|
||||
</provider>
|
||||
</extension>
|
||||
</configuration>
|
||||
<configuration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.1913264106" name="Release">
|
||||
<extension point="org.eclipse.cdt.core.LanguageSettingsProvider">
|
||||
<provider-reference id="org.eclipse.cdt.ui.UserLanguageSettingsProvider" ref="shared-provider"/>
|
||||
<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
|
||||
<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
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||||
<provider class="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" console="false" env-hash="1860105295515578856" id="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" keep-relative-paths="false" name="MCU ARM GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -E -P -v -dD "${INPUTS}"" prefer-non-shared="true">
|
||||
<language-scope id="org.eclipse.cdt.core.gcc"/>
|
||||
<language-scope id="org.eclipse.cdt.core.g++"/>
|
||||
</provider>
|
||||
</extension>
|
||||
</configuration>
|
||||
</project>
|
||||
@ -0,0 +1,6 @@
|
||||
doxygen/doxygen_new_line_after_brief=true
|
||||
doxygen/doxygen_use_brief_tag=false
|
||||
doxygen/doxygen_use_javadoc_tags=true
|
||||
doxygen/doxygen_use_pre_tag=false
|
||||
doxygen/doxygen_use_structural_commands=false
|
||||
eclipse.preferences.version=1
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||||
@ -0,0 +1,3 @@
|
||||
8DF89ED150041C4CBC7CB9A9CAA90856=C5E1824A0B13968526644C43886096FF
|
||||
DC22A860405A8BF2F2C095E5B6529F12=4D7EE1D6C5A5403900DC00F62792B0CC
|
||||
eclipse.preferences.version=1
|
||||
@ -0,0 +1,69 @@
|
||||
/* USER CODE BEGIN Header */
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file : main.h
|
||||
* @brief : Header for main.c file.
|
||||
* This file contains the common defines of the application.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2023 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
/* USER CODE END Header */
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __MAIN_H
|
||||
#define __MAIN_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32f4xx_hal.h"
|
||||
|
||||
/* Private includes ----------------------------------------------------------*/
|
||||
/* USER CODE BEGIN Includes */
|
||||
|
||||
/* USER CODE END Includes */
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN ET */
|
||||
|
||||
/* USER CODE END ET */
|
||||
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/* USER CODE BEGIN EC */
|
||||
|
||||
/* USER CODE END EC */
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN EM */
|
||||
|
||||
/* USER CODE END EM */
|
||||
|
||||
void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim);
|
||||
|
||||
/* Exported functions prototypes ---------------------------------------------*/
|
||||
void Error_Handler(void);
|
||||
|
||||
/* USER CODE BEGIN EFP */
|
||||
/* USER CODE END EFP */
|
||||
|
||||
/* Private defines -----------------------------------------------------------*/
|
||||
|
||||
/* USER CODE BEGIN Private defines */
|
||||
/* USER CODE END Private defines */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __MAIN_H */
|
||||
@ -0,0 +1,495 @@
|
||||
/* USER CODE BEGIN Header */
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32f4xx_hal_conf_template.h
|
||||
* @author MCD Application Team
|
||||
* @brief HAL configuration template file.
|
||||
* This file should be copied to the application folder and renamed
|
||||
* to stm32f4xx_hal_conf.h.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2017 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
/* USER CODE END Header */
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32F4xx_HAL_CONF_H
|
||||
#define __STM32F4xx_HAL_CONF_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
|
||||
/* ########################## Module Selection ############################## */
|
||||
/**
|
||||
* @brief This is the list of modules to be used in the HAL driver
|
||||
*/
|
||||
#define HAL_MODULE_ENABLED
|
||||
|
||||
/* #define HAL_CRYP_MODULE_ENABLED */
|
||||
/* #define HAL_ADC_MODULE_ENABLED */
|
||||
/* #define HAL_CAN_MODULE_ENABLED */
|
||||
/* #define HAL_CRC_MODULE_ENABLED */
|
||||
/* #define HAL_CAN_LEGACY_MODULE_ENABLED */
|
||||
/* #define HAL_DAC_MODULE_ENABLED */
|
||||
/* #define HAL_DCMI_MODULE_ENABLED */
|
||||
/* #define HAL_DMA2D_MODULE_ENABLED */
|
||||
/* #define HAL_ETH_MODULE_ENABLED */
|
||||
/* #define HAL_ETH_LEGACY_MODULE_ENABLED */
|
||||
/* #define HAL_NAND_MODULE_ENABLED */
|
||||
/* #define HAL_NOR_MODULE_ENABLED */
|
||||
/* #define HAL_PCCARD_MODULE_ENABLED */
|
||||
/* #define HAL_SRAM_MODULE_ENABLED */
|
||||
/* #define HAL_SDRAM_MODULE_ENABLED */
|
||||
/* #define HAL_HASH_MODULE_ENABLED */
|
||||
/* #define HAL_I2C_MODULE_ENABLED */
|
||||
/* #define HAL_I2S_MODULE_ENABLED */
|
||||
/* #define HAL_IWDG_MODULE_ENABLED */
|
||||
/* #define HAL_LTDC_MODULE_ENABLED */
|
||||
/* #define HAL_RNG_MODULE_ENABLED */
|
||||
/* #define HAL_RTC_MODULE_ENABLED */
|
||||
/* #define HAL_SAI_MODULE_ENABLED */
|
||||
/* #define HAL_SD_MODULE_ENABLED */
|
||||
/* #define HAL_MMC_MODULE_ENABLED */
|
||||
#define HAL_SPI_MODULE_ENABLED
|
||||
#define HAL_TIM_MODULE_ENABLED
|
||||
/* #define HAL_UART_MODULE_ENABLED */
|
||||
/* #define HAL_USART_MODULE_ENABLED */
|
||||
/* #define HAL_IRDA_MODULE_ENABLED */
|
||||
/* #define HAL_SMARTCARD_MODULE_ENABLED */
|
||||
/* #define HAL_SMBUS_MODULE_ENABLED */
|
||||
/* #define HAL_WWDG_MODULE_ENABLED */
|
||||
/* #define HAL_PCD_MODULE_ENABLED */
|
||||
/* #define HAL_HCD_MODULE_ENABLED */
|
||||
/* #define HAL_DSI_MODULE_ENABLED */
|
||||
/* #define HAL_QSPI_MODULE_ENABLED */
|
||||
/* #define HAL_QSPI_MODULE_ENABLED */
|
||||
/* #define HAL_CEC_MODULE_ENABLED */
|
||||
/* #define HAL_FMPI2C_MODULE_ENABLED */
|
||||
/* #define HAL_FMPSMBUS_MODULE_ENABLED */
|
||||
/* #define HAL_SPDIFRX_MODULE_ENABLED */
|
||||
/* #define HAL_DFSDM_MODULE_ENABLED */
|
||||
/* #define HAL_LPTIM_MODULE_ENABLED */
|
||||
#define HAL_GPIO_MODULE_ENABLED
|
||||
#define HAL_EXTI_MODULE_ENABLED
|
||||
#define HAL_DMA_MODULE_ENABLED
|
||||
#define HAL_RCC_MODULE_ENABLED
|
||||
#define HAL_FLASH_MODULE_ENABLED
|
||||
#define HAL_PWR_MODULE_ENABLED
|
||||
#define HAL_CORTEX_MODULE_ENABLED
|
||||
|
||||
/* ########################## HSE/HSI Values adaptation ##################### */
|
||||
/**
|
||||
* @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
|
||||
* This value is used by the RCC HAL module to compute the system frequency
|
||||
* (when HSE is used as system clock source, directly or through the PLL).
|
||||
*/
|
||||
#if !defined (HSE_VALUE)
|
||||
#define HSE_VALUE 24000000U /*!< Value of the External oscillator in Hz */
|
||||
#endif /* HSE_VALUE */
|
||||
|
||||
#if !defined (HSE_STARTUP_TIMEOUT)
|
||||
#define HSE_STARTUP_TIMEOUT 100U /*!< Time out for HSE start up, in ms */
|
||||
#endif /* HSE_STARTUP_TIMEOUT */
|
||||
|
||||
/**
|
||||
* @brief Internal High Speed oscillator (HSI) value.
|
||||
* This value is used by the RCC HAL module to compute the system frequency
|
||||
* (when HSI is used as system clock source, directly or through the PLL).
|
||||
*/
|
||||
#if !defined (HSI_VALUE)
|
||||
#define HSI_VALUE ((uint32_t)16000000U) /*!< Value of the Internal oscillator in Hz*/
|
||||
#endif /* HSI_VALUE */
|
||||
|
||||
/**
|
||||
* @brief Internal Low Speed oscillator (LSI) value.
|
||||
*/
|
||||
#if !defined (LSI_VALUE)
|
||||
#define LSI_VALUE 32000U /*!< LSI Typical Value in Hz*/
|
||||
#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz
|
||||
The real value may vary depending on the variations
|
||||
in voltage and temperature.*/
|
||||
/**
|
||||
* @brief External Low Speed oscillator (LSE) value.
|
||||
*/
|
||||
#if !defined (LSE_VALUE)
|
||||
#define LSE_VALUE 32768U /*!< Value of the External Low Speed oscillator in Hz */
|
||||
#endif /* LSE_VALUE */
|
||||
|
||||
#if !defined (LSE_STARTUP_TIMEOUT)
|
||||
#define LSE_STARTUP_TIMEOUT 5000U /*!< Time out for LSE start up, in ms */
|
||||
#endif /* LSE_STARTUP_TIMEOUT */
|
||||
|
||||
/**
|
||||
* @brief External clock source for I2S peripheral
|
||||
* This value is used by the I2S HAL module to compute the I2S clock source
|
||||
* frequency, this source is inserted directly through I2S_CKIN pad.
|
||||
*/
|
||||
#if !defined (EXTERNAL_CLOCK_VALUE)
|
||||
#define EXTERNAL_CLOCK_VALUE 12288000U /*!< Value of the External audio frequency in Hz*/
|
||||
#endif /* EXTERNAL_CLOCK_VALUE */
|
||||
|
||||
/* Tip: To avoid modifying this file each time you need to use different HSE,
|
||||
=== you can define the HSE value in your toolchain compiler preprocessor. */
|
||||
|
||||
/* ########################### System Configuration ######################### */
|
||||
/**
|
||||
* @brief This is the HAL system configuration section
|
||||
*/
|
||||
#define VDD_VALUE 3300U /*!< Value of VDD in mv */
|
||||
#define TICK_INT_PRIORITY 15U /*!< tick interrupt priority */
|
||||
#define USE_RTOS 0U
|
||||
#define PREFETCH_ENABLE 1U
|
||||
#define INSTRUCTION_CACHE_ENABLE 1U
|
||||
#define DATA_CACHE_ENABLE 1U
|
||||
|
||||
#define USE_HAL_ADC_REGISTER_CALLBACKS 0U /* ADC register callback disabled */
|
||||
#define USE_HAL_CAN_REGISTER_CALLBACKS 0U /* CAN register callback disabled */
|
||||
#define USE_HAL_CEC_REGISTER_CALLBACKS 0U /* CEC register callback disabled */
|
||||
#define USE_HAL_CRYP_REGISTER_CALLBACKS 0U /* CRYP register callback disabled */
|
||||
#define USE_HAL_DAC_REGISTER_CALLBACKS 0U /* DAC register callback disabled */
|
||||
#define USE_HAL_DCMI_REGISTER_CALLBACKS 0U /* DCMI register callback disabled */
|
||||
#define USE_HAL_DFSDM_REGISTER_CALLBACKS 0U /* DFSDM register callback disabled */
|
||||
#define USE_HAL_DMA2D_REGISTER_CALLBACKS 0U /* DMA2D register callback disabled */
|
||||
#define USE_HAL_DSI_REGISTER_CALLBACKS 0U /* DSI register callback disabled */
|
||||
#define USE_HAL_ETH_REGISTER_CALLBACKS 0U /* ETH register callback disabled */
|
||||
#define USE_HAL_HASH_REGISTER_CALLBACKS 0U /* HASH register callback disabled */
|
||||
#define USE_HAL_HCD_REGISTER_CALLBACKS 0U /* HCD register callback disabled */
|
||||
#define USE_HAL_I2C_REGISTER_CALLBACKS 0U /* I2C register callback disabled */
|
||||
#define USE_HAL_FMPI2C_REGISTER_CALLBACKS 0U /* FMPI2C register callback disabled */
|
||||
#define USE_HAL_FMPSMBUS_REGISTER_CALLBACKS 0U /* FMPSMBUS register callback disabled */
|
||||
#define USE_HAL_I2S_REGISTER_CALLBACKS 0U /* I2S register callback disabled */
|
||||
#define USE_HAL_IRDA_REGISTER_CALLBACKS 0U /* IRDA register callback disabled */
|
||||
#define USE_HAL_LPTIM_REGISTER_CALLBACKS 0U /* LPTIM register callback disabled */
|
||||
#define USE_HAL_LTDC_REGISTER_CALLBACKS 0U /* LTDC register callback disabled */
|
||||
#define USE_HAL_MMC_REGISTER_CALLBACKS 0U /* MMC register callback disabled */
|
||||
#define USE_HAL_NAND_REGISTER_CALLBACKS 0U /* NAND register callback disabled */
|
||||
#define USE_HAL_NOR_REGISTER_CALLBACKS 0U /* NOR register callback disabled */
|
||||
#define USE_HAL_PCCARD_REGISTER_CALLBACKS 0U /* PCCARD register callback disabled */
|
||||
#define USE_HAL_PCD_REGISTER_CALLBACKS 0U /* PCD register callback disabled */
|
||||
#define USE_HAL_QSPI_REGISTER_CALLBACKS 0U /* QSPI register callback disabled */
|
||||
#define USE_HAL_RNG_REGISTER_CALLBACKS 0U /* RNG register callback disabled */
|
||||
#define USE_HAL_RTC_REGISTER_CALLBACKS 0U /* RTC register callback disabled */
|
||||
#define USE_HAL_SAI_REGISTER_CALLBACKS 0U /* SAI register callback disabled */
|
||||
#define USE_HAL_SD_REGISTER_CALLBACKS 0U /* SD register callback disabled */
|
||||
#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U /* SMARTCARD register callback disabled */
|
||||
#define USE_HAL_SDRAM_REGISTER_CALLBACKS 0U /* SDRAM register callback disabled */
|
||||
#define USE_HAL_SRAM_REGISTER_CALLBACKS 0U /* SRAM register callback disabled */
|
||||
#define USE_HAL_SPDIFRX_REGISTER_CALLBACKS 0U /* SPDIFRX register callback disabled */
|
||||
#define USE_HAL_SMBUS_REGISTER_CALLBACKS 0U /* SMBUS register callback disabled */
|
||||
#define USE_HAL_SPI_REGISTER_CALLBACKS 0U /* SPI register callback disabled */
|
||||
#define USE_HAL_TIM_REGISTER_CALLBACKS 0U /* TIM register callback disabled */
|
||||
#define USE_HAL_UART_REGISTER_CALLBACKS 0U /* UART register callback disabled */
|
||||
#define USE_HAL_USART_REGISTER_CALLBACKS 0U /* USART register callback disabled */
|
||||
#define USE_HAL_WWDG_REGISTER_CALLBACKS 0U /* WWDG register callback disabled */
|
||||
|
||||
/* ########################## Assert Selection ############################## */
|
||||
/**
|
||||
* @brief Uncomment the line below to expanse the "assert_param" macro in the
|
||||
* HAL drivers code
|
||||
*/
|
||||
/* #define USE_FULL_ASSERT 1U */
|
||||
|
||||
/* ################## Ethernet peripheral configuration ##################### */
|
||||
|
||||
/* Section 1 : Ethernet peripheral configuration */
|
||||
|
||||
/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */
|
||||
#define MAC_ADDR0 2U
|
||||
#define MAC_ADDR1 0U
|
||||
#define MAC_ADDR2 0U
|
||||
#define MAC_ADDR3 0U
|
||||
#define MAC_ADDR4 0U
|
||||
#define MAC_ADDR5 0U
|
||||
|
||||
/* Definition of the Ethernet driver buffers size and count */
|
||||
#define ETH_RX_BUF_SIZE /* buffer size for receive */
|
||||
#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */
|
||||
#define ETH_RXBUFNB 4U /* 4 Rx buffers of size ETH_RX_BUF_SIZE */
|
||||
#define ETH_TXBUFNB 4U /* 4 Tx buffers of size ETH_TX_BUF_SIZE */
|
||||
|
||||
/* Section 2: PHY configuration section */
|
||||
|
||||
/* DP83848_PHY_ADDRESS Address*/
|
||||
#define DP83848_PHY_ADDRESS
|
||||
/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/
|
||||
#define PHY_RESET_DELAY 0x000000FFU
|
||||
/* PHY Configuration delay */
|
||||
#define PHY_CONFIG_DELAY 0x00000FFFU
|
||||
|
||||
#define PHY_READ_TO 0x0000FFFFU
|
||||
#define PHY_WRITE_TO 0x0000FFFFU
|
||||
|
||||
/* Section 3: Common PHY Registers */
|
||||
|
||||
#define PHY_BCR ((uint16_t)0x0000U) /*!< Transceiver Basic Control Register */
|
||||
#define PHY_BSR ((uint16_t)0x0001U) /*!< Transceiver Basic Status Register */
|
||||
|
||||
#define PHY_RESET ((uint16_t)0x8000U) /*!< PHY Reset */
|
||||
#define PHY_LOOPBACK ((uint16_t)0x4000U) /*!< Select loop-back mode */
|
||||
#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100U) /*!< Set the full-duplex mode at 100 Mb/s */
|
||||
#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000U) /*!< Set the half-duplex mode at 100 Mb/s */
|
||||
#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100U) /*!< Set the full-duplex mode at 10 Mb/s */
|
||||
#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000U) /*!< Set the half-duplex mode at 10 Mb/s */
|
||||
#define PHY_AUTONEGOTIATION ((uint16_t)0x1000U) /*!< Enable auto-negotiation function */
|
||||
#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200U) /*!< Restart auto-negotiation function */
|
||||
#define PHY_POWERDOWN ((uint16_t)0x0800U) /*!< Select the power down mode */
|
||||
#define PHY_ISOLATE ((uint16_t)0x0400U) /*!< Isolate PHY from MII */
|
||||
|
||||
#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020U) /*!< Auto-Negotiation process completed */
|
||||
#define PHY_LINKED_STATUS ((uint16_t)0x0004U) /*!< Valid link established */
|
||||
#define PHY_JABBER_DETECTION ((uint16_t)0x0002U) /*!< Jabber condition detected */
|
||||
|
||||
/* Section 4: Extended PHY Registers */
|
||||
#define PHY_SR ((uint16_t)) /*!< PHY status register Offset */
|
||||
|
||||
#define PHY_SPEED_STATUS ((uint16_t)) /*!< PHY Speed mask */
|
||||
#define PHY_DUPLEX_STATUS ((uint16_t)) /*!< PHY Duplex mask */
|
||||
|
||||
/* ################## SPI peripheral configuration ########################## */
|
||||
|
||||
/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
|
||||
* Activated: CRC code is present inside driver
|
||||
* Deactivated: CRC code cleaned from driver
|
||||
*/
|
||||
|
||||
#define USE_SPI_CRC 0U
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
/**
|
||||
* @brief Include module's header file
|
||||
*/
|
||||
|
||||
#ifdef HAL_RCC_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_rcc.h"
|
||||
#endif /* HAL_RCC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_GPIO_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_gpio.h"
|
||||
#endif /* HAL_GPIO_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_EXTI_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_exti.h"
|
||||
#endif /* HAL_EXTI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_DMA_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_dma.h"
|
||||
#endif /* HAL_DMA_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CORTEX_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_cortex.h"
|
||||
#endif /* HAL_CORTEX_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_ADC_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_adc.h"
|
||||
#endif /* HAL_ADC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CAN_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_can.h"
|
||||
#endif /* HAL_CAN_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CAN_LEGACY_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_can_legacy.h"
|
||||
#endif /* HAL_CAN_LEGACY_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CRC_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_crc.h"
|
||||
#endif /* HAL_CRC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CRYP_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_cryp.h"
|
||||
#endif /* HAL_CRYP_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_DMA2D_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_dma2d.h"
|
||||
#endif /* HAL_DMA2D_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_DAC_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_dac.h"
|
||||
#endif /* HAL_DAC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_DCMI_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_dcmi.h"
|
||||
#endif /* HAL_DCMI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_ETH_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_eth.h"
|
||||
#endif /* HAL_ETH_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_ETH_LEGACY_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_eth_legacy.h"
|
||||
#endif /* HAL_ETH_LEGACY_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_FLASH_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_flash.h"
|
||||
#endif /* HAL_FLASH_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SRAM_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_sram.h"
|
||||
#endif /* HAL_SRAM_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_NOR_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_nor.h"
|
||||
#endif /* HAL_NOR_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_NAND_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_nand.h"
|
||||
#endif /* HAL_NAND_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_PCCARD_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_pccard.h"
|
||||
#endif /* HAL_PCCARD_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SDRAM_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_sdram.h"
|
||||
#endif /* HAL_SDRAM_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_HASH_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_hash.h"
|
||||
#endif /* HAL_HASH_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_I2C_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_i2c.h"
|
||||
#endif /* HAL_I2C_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SMBUS_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_smbus.h"
|
||||
#endif /* HAL_SMBUS_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_I2S_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_i2s.h"
|
||||
#endif /* HAL_I2S_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_IWDG_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_iwdg.h"
|
||||
#endif /* HAL_IWDG_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_LTDC_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_ltdc.h"
|
||||
#endif /* HAL_LTDC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_PWR_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_pwr.h"
|
||||
#endif /* HAL_PWR_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_RNG_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_rng.h"
|
||||
#endif /* HAL_RNG_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_RTC_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_rtc.h"
|
||||
#endif /* HAL_RTC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SAI_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_sai.h"
|
||||
#endif /* HAL_SAI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SD_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_sd.h"
|
||||
#endif /* HAL_SD_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SPI_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_spi.h"
|
||||
#endif /* HAL_SPI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_TIM_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_tim.h"
|
||||
#endif /* HAL_TIM_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_UART_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_uart.h"
|
||||
#endif /* HAL_UART_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_USART_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_usart.h"
|
||||
#endif /* HAL_USART_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_IRDA_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_irda.h"
|
||||
#endif /* HAL_IRDA_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SMARTCARD_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_smartcard.h"
|
||||
#endif /* HAL_SMARTCARD_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_WWDG_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_wwdg.h"
|
||||
#endif /* HAL_WWDG_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_PCD_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_pcd.h"
|
||||
#endif /* HAL_PCD_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_HCD_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_hcd.h"
|
||||
#endif /* HAL_HCD_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_DSI_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_dsi.h"
|
||||
#endif /* HAL_DSI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_QSPI_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_qspi.h"
|
||||
#endif /* HAL_QSPI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CEC_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_cec.h"
|
||||
#endif /* HAL_CEC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_FMPI2C_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_fmpi2c.h"
|
||||
#endif /* HAL_FMPI2C_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_FMPSMBUS_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_fmpsmbus.h"
|
||||
#endif /* HAL_FMPSMBUS_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SPDIFRX_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_spdifrx.h"
|
||||
#endif /* HAL_SPDIFRX_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_DFSDM_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_dfsdm.h"
|
||||
#endif /* HAL_DFSDM_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_LPTIM_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_lptim.h"
|
||||
#endif /* HAL_LPTIM_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_MMC_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_mmc.h"
|
||||
#endif /* HAL_MMC_MODULE_ENABLED */
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
#ifdef USE_FULL_ASSERT
|
||||
/**
|
||||
* @brief The assert_param macro is used for function's parameters check.
|
||||
* @param expr If expr is false, it calls assert_failed function
|
||||
* which reports the name of the source file and the source
|
||||
* line number of the call that failed.
|
||||
* If expr is true, it returns no value.
|
||||
* @retval None
|
||||
*/
|
||||
#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
|
||||
/* Exported functions ------------------------------------------------------- */
|
||||
void assert_failed(uint8_t* file, uint32_t line);
|
||||
#else
|
||||
#define assert_param(expr) ((void)0U)
|
||||
#endif /* USE_FULL_ASSERT */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32F4xx_HAL_CONF_H */
|
||||
@ -0,0 +1,67 @@
|
||||
/* USER CODE BEGIN Header */
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32f4xx_it.h
|
||||
* @brief This file contains the headers of the interrupt handlers.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2023 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
/* USER CODE END Header */
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32F4xx_IT_H
|
||||
#define __STM32F4xx_IT_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Private includes ----------------------------------------------------------*/
|
||||
/* USER CODE BEGIN Includes */
|
||||
|
||||
/* USER CODE END Includes */
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN ET */
|
||||
|
||||
/* USER CODE END ET */
|
||||
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/* USER CODE BEGIN EC */
|
||||
|
||||
/* USER CODE END EC */
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN EM */
|
||||
|
||||
/* USER CODE END EM */
|
||||
|
||||
/* Exported functions prototypes ---------------------------------------------*/
|
||||
void NMI_Handler(void);
|
||||
void HardFault_Handler(void);
|
||||
void MemManage_Handler(void);
|
||||
void BusFault_Handler(void);
|
||||
void UsageFault_Handler(void);
|
||||
void SVC_Handler(void);
|
||||
void DebugMon_Handler(void);
|
||||
void PendSV_Handler(void);
|
||||
void SysTick_Handler(void);
|
||||
void TIM1_UP_TIM10_IRQHandler(void);
|
||||
/* USER CODE BEGIN EFP */
|
||||
|
||||
/* USER CODE END EFP */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32F4xx_IT_H */
|
||||
@ -0,0 +1,36 @@
|
||||
/*
|
||||
* stm_gen.h
|
||||
*
|
||||
* Created on: Oct 3, 2023
|
||||
* Author: Katya
|
||||
*/
|
||||
|
||||
#ifndef INC_STM_GEN_H_
|
||||
#define INC_STM_GEN_H_
|
||||
|
||||
typedef struct {
|
||||
// SPI input
|
||||
uint8_t time_mode;
|
||||
uint16_t pwm_value;
|
||||
uint8_t f;
|
||||
uint8_t invert; // L12 (1/0)
|
||||
// inner
|
||||
uint8_t coef; // prescaler
|
||||
uint16_t freq_pwm_new; // period
|
||||
uint16_t pwm_value_res; // пересчитанное значение PWM (относительно freq_pwm_new)
|
||||
} Mode;
|
||||
|
||||
#define CHANNELS 2
|
||||
#define F_CPU_TIM1 1000
|
||||
#define F_CPU 24000000
|
||||
#define MAX_PWM_FREQ 65535
|
||||
|
||||
extern Mode modes[CHANNELS];
|
||||
|
||||
void PWMInit(uint8_t prescaler, uint16_t period, uint16_t pwm_value);
|
||||
void ChannelSwap(Mode *mode_ptr, int channel_new, int *channel_var, int settings_flag, int *settings_var);
|
||||
void SetInvert(Mode *mode_ptr);
|
||||
void FillMode(Mode *mode_ptr, uint8_t *recData, int start);
|
||||
void CommonChannelActions(Mode *mode_ptr, int channel, int *channelPtr, int *iter, int *settings_set);
|
||||
|
||||
#endif /* INC_STM_GEN_H_ */
|
||||
@ -0,0 +1,269 @@
|
||||
/* USER CODE BEGIN Header */
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32f4xx_hal_msp.c
|
||||
* @brief This file provides code for the MSP Initialization
|
||||
* and de-Initialization codes.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2023 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
/* USER CODE END Header */
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "main.h"
|
||||
|
||||
/* USER CODE BEGIN Includes */
|
||||
|
||||
/* USER CODE END Includes */
|
||||
|
||||
/* Private typedef -----------------------------------------------------------*/
|
||||
/* USER CODE BEGIN TD */
|
||||
|
||||
/* USER CODE END TD */
|
||||
|
||||
/* Private define ------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN Define */
|
||||
|
||||
/* USER CODE END Define */
|
||||
|
||||
/* Private macro -------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN Macro */
|
||||
|
||||
/* USER CODE END Macro */
|
||||
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
/* USER CODE BEGIN PV */
|
||||
|
||||
/* USER CODE END PV */
|
||||
|
||||
/* Private function prototypes -----------------------------------------------*/
|
||||
/* USER CODE BEGIN PFP */
|
||||
|
||||
/* USER CODE END PFP */
|
||||
|
||||
/* External functions --------------------------------------------------------*/
|
||||
/* USER CODE BEGIN ExternalFunctions */
|
||||
|
||||
/* USER CODE END ExternalFunctions */
|
||||
|
||||
/* USER CODE BEGIN 0 */
|
||||
|
||||
/* USER CODE END 0 */
|
||||
|
||||
void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim);
|
||||
/**
|
||||
* Initializes the Global MSP.
|
||||
*/
|
||||
void HAL_MspInit(void)
|
||||
{
|
||||
/* USER CODE BEGIN MspInit 0 */
|
||||
|
||||
/* USER CODE END MspInit 0 */
|
||||
|
||||
__HAL_RCC_SYSCFG_CLK_ENABLE();
|
||||
__HAL_RCC_PWR_CLK_ENABLE();
|
||||
|
||||
/* System interrupt init*/
|
||||
|
||||
/* USER CODE BEGIN MspInit 1 */
|
||||
|
||||
/* USER CODE END MspInit 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief SPI MSP Initialization
|
||||
* This function configures the hardware resources used in this example
|
||||
* @param hspi: SPI handle pointer
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi)
|
||||
{
|
||||
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
||||
if(hspi->Instance==SPI1)
|
||||
{
|
||||
/* USER CODE BEGIN SPI1_MspInit 0 */
|
||||
|
||||
/* USER CODE END SPI1_MspInit 0 */
|
||||
/* Peripheral clock enable */
|
||||
__HAL_RCC_SPI1_CLK_ENABLE();
|
||||
|
||||
__HAL_RCC_GPIOA_CLK_ENABLE();
|
||||
/**SPI1 GPIO Configuration
|
||||
PA5 ------> SPI1_SCK
|
||||
PA6 ------> SPI1_MISO
|
||||
PA7 ------> SPI1_MOSI
|
||||
*/
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF5_SPI1;
|
||||
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||
|
||||
/* USER CODE BEGIN SPI1_MspInit 1 */
|
||||
|
||||
/* USER CODE END SPI1_MspInit 1 */
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief SPI MSP De-Initialization
|
||||
* This function freeze the hardware resources used in this example
|
||||
* @param hspi: SPI handle pointer
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_SPI_MspDeInit(SPI_HandleTypeDef* hspi)
|
||||
{
|
||||
if(hspi->Instance==SPI1)
|
||||
{
|
||||
/* USER CODE BEGIN SPI1_MspDeInit 0 */
|
||||
|
||||
/* USER CODE END SPI1_MspDeInit 0 */
|
||||
/* Peripheral clock disable */
|
||||
__HAL_RCC_SPI1_CLK_DISABLE();
|
||||
|
||||
/**SPI1 GPIO Configuration
|
||||
PA5 ------> SPI1_SCK
|
||||
PA6 ------> SPI1_MISO
|
||||
PA7 ------> SPI1_MOSI
|
||||
*/
|
||||
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7);
|
||||
|
||||
/* USER CODE BEGIN SPI1_MspDeInit 1 */
|
||||
|
||||
/* USER CODE END SPI1_MspDeInit 1 */
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief TIM_Base MSP Initialization
|
||||
* This function configures the hardware resources used in this example
|
||||
* @param htim_base: TIM_Base handle pointer
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
|
||||
{
|
||||
if(htim_base->Instance==TIM1)
|
||||
{
|
||||
/* USER CODE BEGIN TIM1_MspInit 0 */
|
||||
|
||||
/* USER CODE END TIM1_MspInit 0 */
|
||||
/* Peripheral clock enable */
|
||||
__HAL_RCC_TIM1_CLK_ENABLE();
|
||||
/* TIM1 interrupt Init */
|
||||
HAL_NVIC_SetPriority(TIM1_UP_TIM10_IRQn, 0, 0);
|
||||
HAL_NVIC_EnableIRQ(TIM1_UP_TIM10_IRQn);
|
||||
/* USER CODE BEGIN TIM1_MspInit 1 */
|
||||
|
||||
/* USER CODE END TIM1_MspInit 1 */
|
||||
}
|
||||
else if(htim_base->Instance==TIM2)
|
||||
{
|
||||
/* USER CODE BEGIN TIM2_MspInit 0 */
|
||||
|
||||
/* USER CODE END TIM2_MspInit 0 */
|
||||
/* Peripheral clock enable */
|
||||
__HAL_RCC_TIM2_CLK_ENABLE();
|
||||
/* USER CODE BEGIN TIM2_MspInit 1 */
|
||||
|
||||
/* USER CODE END TIM2_MspInit 1 */
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
void HAL_TIM_MspPostInit(TIM_HandleTypeDef* htim)
|
||||
{
|
||||
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
||||
if(htim->Instance==TIM1)
|
||||
{
|
||||
/* USER CODE BEGIN TIM1_MspPostInit 0 */
|
||||
|
||||
/* USER CODE END TIM1_MspPostInit 0 */
|
||||
__HAL_RCC_GPIOE_CLK_ENABLE();
|
||||
/**TIM1 GPIO Configuration
|
||||
PE9 ------> TIM1_CH1
|
||||
*/
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_9;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF1_TIM1;
|
||||
HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
|
||||
|
||||
/* USER CODE BEGIN TIM1_MspPostInit 1 */
|
||||
|
||||
/* USER CODE END TIM1_MspPostInit 1 */
|
||||
}
|
||||
else if(htim->Instance==TIM2)
|
||||
{
|
||||
/* USER CODE BEGIN TIM2_MspPostInit 0 */
|
||||
|
||||
/* USER CODE END TIM2_MspPostInit 0 */
|
||||
|
||||
__HAL_RCC_GPIOA_CLK_ENABLE();
|
||||
/**TIM2 GPIO Configuration
|
||||
PA0-WKUP ------> TIM2_CH1
|
||||
*/
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_0;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_PULLDOWN;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF1_TIM2;
|
||||
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||
|
||||
/* USER CODE BEGIN TIM2_MspPostInit 1 */
|
||||
|
||||
/* USER CODE END TIM2_MspPostInit 1 */
|
||||
}
|
||||
|
||||
}
|
||||
/**
|
||||
* @brief TIM_Base MSP De-Initialization
|
||||
* This function freeze the hardware resources used in this example
|
||||
* @param htim_base: TIM_Base handle pointer
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* htim_base)
|
||||
{
|
||||
if(htim_base->Instance==TIM1)
|
||||
{
|
||||
/* USER CODE BEGIN TIM1_MspDeInit 0 */
|
||||
|
||||
/* USER CODE END TIM1_MspDeInit 0 */
|
||||
/* Peripheral clock disable */
|
||||
__HAL_RCC_TIM1_CLK_DISABLE();
|
||||
|
||||
/* TIM1 interrupt DeInit */
|
||||
HAL_NVIC_DisableIRQ(TIM1_UP_TIM10_IRQn);
|
||||
/* USER CODE BEGIN TIM1_MspDeInit 1 */
|
||||
|
||||
/* USER CODE END TIM1_MspDeInit 1 */
|
||||
}
|
||||
else if(htim_base->Instance==TIM2)
|
||||
{
|
||||
/* USER CODE BEGIN TIM2_MspDeInit 0 */
|
||||
|
||||
/* USER CODE END TIM2_MspDeInit 0 */
|
||||
/* Peripheral clock disable */
|
||||
__HAL_RCC_TIM2_CLK_DISABLE();
|
||||
/* USER CODE BEGIN TIM2_MspDeInit 1 */
|
||||
|
||||
/* USER CODE END TIM2_MspDeInit 1 */
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/* USER CODE BEGIN 1 */
|
||||
|
||||
/* USER CODE END 1 */
|
||||
@ -0,0 +1,228 @@
|
||||
/* USER CODE BEGIN Header */
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32f4xx_it.c
|
||||
* @brief Interrupt Service Routines.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2023 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
/* USER CODE END Header */
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "main.h"
|
||||
#include "stm32f4xx_it.h"
|
||||
/* Private includes ----------------------------------------------------------*/
|
||||
/* USER CODE BEGIN Includes */
|
||||
#include "stm_gen.h"
|
||||
/* USER CODE END Includes */
|
||||
|
||||
/* Private typedef -----------------------------------------------------------*/
|
||||
/* USER CODE BEGIN TD */
|
||||
|
||||
/* USER CODE END TD */
|
||||
|
||||
/* Private define ------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN PD */
|
||||
/* USER CODE END PD */
|
||||
|
||||
/* Private macro -------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN PM */
|
||||
|
||||
/* USER CODE END PM */
|
||||
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
/* USER CODE BEGIN PV */
|
||||
/* USER CODE END PV */
|
||||
|
||||
/* Private function prototypes -----------------------------------------------*/
|
||||
/* USER CODE BEGIN PFP */
|
||||
|
||||
/* USER CODE END PFP */
|
||||
|
||||
/* Private user code ---------------------------------------------------------*/
|
||||
/* USER CODE BEGIN 0 */
|
||||
/* USER CODE END 0 */
|
||||
|
||||
/* External variables --------------------------------------------------------*/
|
||||
extern TIM_HandleTypeDef htim1;
|
||||
/* USER CODE BEGIN EV */
|
||||
extern TIM_HandleTypeDef htim2;
|
||||
extern int channel, iter, settings_set;
|
||||
/* USER CODE END EV */
|
||||
|
||||
/******************************************************************************/
|
||||
/* Cortex-M4 Processor Interruption and Exception Handlers */
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* @brief This function handles Non maskable interrupt.
|
||||
*/
|
||||
void NMI_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
|
||||
|
||||
/* USER CODE END NonMaskableInt_IRQn 0 */
|
||||
/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
|
||||
while (1)
|
||||
{
|
||||
}
|
||||
/* USER CODE END NonMaskableInt_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Hard fault interrupt.
|
||||
*/
|
||||
void HardFault_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN HardFault_IRQn 0 */
|
||||
|
||||
/* USER CODE END HardFault_IRQn 0 */
|
||||
while (1)
|
||||
{
|
||||
/* USER CODE BEGIN W1_HardFault_IRQn 0 */
|
||||
/* USER CODE END W1_HardFault_IRQn 0 */
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Memory management fault.
|
||||
*/
|
||||
void MemManage_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN MemoryManagement_IRQn 0 */
|
||||
|
||||
/* USER CODE END MemoryManagement_IRQn 0 */
|
||||
while (1)
|
||||
{
|
||||
/* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
|
||||
/* USER CODE END W1_MemoryManagement_IRQn 0 */
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Pre-fetch fault, memory access fault.
|
||||
*/
|
||||
void BusFault_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN BusFault_IRQn 0 */
|
||||
|
||||
/* USER CODE END BusFault_IRQn 0 */
|
||||
while (1)
|
||||
{
|
||||
/* USER CODE BEGIN W1_BusFault_IRQn 0 */
|
||||
/* USER CODE END W1_BusFault_IRQn 0 */
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Undefined instruction or illegal state.
|
||||
*/
|
||||
void UsageFault_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN UsageFault_IRQn 0 */
|
||||
|
||||
/* USER CODE END UsageFault_IRQn 0 */
|
||||
while (1)
|
||||
{
|
||||
/* USER CODE BEGIN W1_UsageFault_IRQn 0 */
|
||||
/* USER CODE END W1_UsageFault_IRQn 0 */
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles System service call via SWI instruction.
|
||||
*/
|
||||
void SVC_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN SVCall_IRQn 0 */
|
||||
|
||||
/* USER CODE END SVCall_IRQn 0 */
|
||||
/* USER CODE BEGIN SVCall_IRQn 1 */
|
||||
|
||||
/* USER CODE END SVCall_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Debug monitor.
|
||||
*/
|
||||
void DebugMon_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN DebugMonitor_IRQn 0 */
|
||||
|
||||
/* USER CODE END DebugMonitor_IRQn 0 */
|
||||
/* USER CODE BEGIN DebugMonitor_IRQn 1 */
|
||||
|
||||
/* USER CODE END DebugMonitor_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Pendable request for system service.
|
||||
*/
|
||||
void PendSV_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN PendSV_IRQn 0 */
|
||||
|
||||
/* USER CODE END PendSV_IRQn 0 */
|
||||
/* USER CODE BEGIN PendSV_IRQn 1 */
|
||||
|
||||
/* USER CODE END PendSV_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles System tick timer.
|
||||
*/
|
||||
void SysTick_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN SysTick_IRQn 0 */
|
||||
/* USER CODE END SysTick_IRQn 0 */
|
||||
HAL_IncTick();
|
||||
/* USER CODE BEGIN SysTick_IRQn 1 */
|
||||
/* USER CODE END SysTick_IRQn 1 */
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/* STM32F4xx Peripheral Interrupt Handlers */
|
||||
/* Add here the Interrupt Handlers for the used peripherals. */
|
||||
/* For the available peripheral interrupt handler names, */
|
||||
/* please refer to the startup file (startup_stm32f4xx.s). */
|
||||
/******************************************************************************/
|
||||
|
||||
/**
|
||||
* @brief This function handles TIM1 update interrupt and TIM10 global interrupt.
|
||||
*/
|
||||
void TIM1_UP_TIM10_IRQHandler(void)
|
||||
{
|
||||
/* USER CODE BEGIN TIM1_UP_TIM10_IRQn 0 */
|
||||
HAL_TIM_PWM_Stop(&htim2, TIM_CHANNEL_1);
|
||||
if (channel == 1) { // сейчас канал 1
|
||||
if (iter == 0) { // стартовая настройка
|
||||
CommonChannelActions(&modes[0], 1, &channel, &iter, &settings_set);
|
||||
} else {
|
||||
CommonChannelActions(&modes[1], 2, &channel, &iter, &settings_set);
|
||||
}
|
||||
} else if (channel == 2) { // сейчас канал 2
|
||||
CommonChannelActions(&modes[0], 1, &channel, &iter, &settings_set);
|
||||
}
|
||||
|
||||
/* USER CODE END TIM1_UP_TIM10_IRQn 0 */
|
||||
HAL_TIM_IRQHandler(&htim1);
|
||||
/* USER CODE BEGIN TIM1_UP_TIM10_IRQn 1 */
|
||||
|
||||
/* USER CODE END TIM1_UP_TIM10_IRQn 1 */
|
||||
}
|
||||
|
||||
/* USER CODE BEGIN 1 */
|
||||
void CommonChannelActions(Mode *mode_ptr, int channel, int *channelPtr, int *iter, int *settings_set) {
|
||||
ChannelSwap(mode_ptr, channel, channelPtr, (channel == 1) ? 1 : 0, settings_set);
|
||||
SetInvert(mode_ptr);
|
||||
if (channel == 1) *iter = 1;
|
||||
}
|
||||
/* USER CODE END 1 */
|
||||
@ -0,0 +1,176 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file syscalls.c
|
||||
* @author Auto-generated by STM32CubeIDE
|
||||
* @brief STM32CubeIDE Minimal System calls file
|
||||
*
|
||||
* For more information about which c-functions
|
||||
* need which of these lowlevel functions
|
||||
* please consult the Newlib libc-manual
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2020-2023 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Includes */
|
||||
#include <sys/stat.h>
|
||||
#include <stdlib.h>
|
||||
#include <errno.h>
|
||||
#include <stdio.h>
|
||||
#include <signal.h>
|
||||
#include <time.h>
|
||||
#include <sys/time.h>
|
||||
#include <sys/times.h>
|
||||
|
||||
|
||||
/* Variables */
|
||||
extern int __io_putchar(int ch) __attribute__((weak));
|
||||
extern int __io_getchar(void) __attribute__((weak));
|
||||
|
||||
|
||||
char *__env[1] = { 0 };
|
||||
char **environ = __env;
|
||||
|
||||
|
||||
/* Functions */
|
||||
void initialise_monitor_handles()
|
||||
{
|
||||
}
|
||||
|
||||
int _getpid(void)
|
||||
{
|
||||
return 1;
|
||||
}
|
||||
|
||||
int _kill(int pid, int sig)
|
||||
{
|
||||
(void)pid;
|
||||
(void)sig;
|
||||
errno = EINVAL;
|
||||
return -1;
|
||||
}
|
||||
|
||||
void _exit (int status)
|
||||
{
|
||||
_kill(status, -1);
|
||||
while (1) {} /* Make sure we hang here */
|
||||
}
|
||||
|
||||
__attribute__((weak)) int _read(int file, char *ptr, int len)
|
||||
{
|
||||
(void)file;
|
||||
int DataIdx;
|
||||
|
||||
for (DataIdx = 0; DataIdx < len; DataIdx++)
|
||||
{
|
||||
*ptr++ = __io_getchar();
|
||||
}
|
||||
|
||||
return len;
|
||||
}
|
||||
|
||||
__attribute__((weak)) int _write(int file, char *ptr, int len)
|
||||
{
|
||||
(void)file;
|
||||
int DataIdx;
|
||||
|
||||
for (DataIdx = 0; DataIdx < len; DataIdx++)
|
||||
{
|
||||
__io_putchar(*ptr++);
|
||||
}
|
||||
return len;
|
||||
}
|
||||
|
||||
int _close(int file)
|
||||
{
|
||||
(void)file;
|
||||
return -1;
|
||||
}
|
||||
|
||||
|
||||
int _fstat(int file, struct stat *st)
|
||||
{
|
||||
(void)file;
|
||||
st->st_mode = S_IFCHR;
|
||||
return 0;
|
||||
}
|
||||
|
||||
int _isatty(int file)
|
||||
{
|
||||
(void)file;
|
||||
return 1;
|
||||
}
|
||||
|
||||
int _lseek(int file, int ptr, int dir)
|
||||
{
|
||||
(void)file;
|
||||
(void)ptr;
|
||||
(void)dir;
|
||||
return 0;
|
||||
}
|
||||
|
||||
int _open(char *path, int flags, ...)
|
||||
{
|
||||
(void)path;
|
||||
(void)flags;
|
||||
/* Pretend like we always fail */
|
||||
return -1;
|
||||
}
|
||||
|
||||
int _wait(int *status)
|
||||
{
|
||||
(void)status;
|
||||
errno = ECHILD;
|
||||
return -1;
|
||||
}
|
||||
|
||||
int _unlink(char *name)
|
||||
{
|
||||
(void)name;
|
||||
errno = ENOENT;
|
||||
return -1;
|
||||
}
|
||||
|
||||
int _times(struct tms *buf)
|
||||
{
|
||||
(void)buf;
|
||||
return -1;
|
||||
}
|
||||
|
||||
int _stat(char *file, struct stat *st)
|
||||
{
|
||||
(void)file;
|
||||
st->st_mode = S_IFCHR;
|
||||
return 0;
|
||||
}
|
||||
|
||||
int _link(char *old, char *new)
|
||||
{
|
||||
(void)old;
|
||||
(void)new;
|
||||
errno = EMLINK;
|
||||
return -1;
|
||||
}
|
||||
|
||||
int _fork(void)
|
||||
{
|
||||
errno = EAGAIN;
|
||||
return -1;
|
||||
}
|
||||
|
||||
int _execve(char *name, char **argv, char **env)
|
||||
{
|
||||
(void)name;
|
||||
(void)argv;
|
||||
(void)env;
|
||||
errno = ENOMEM;
|
||||
return -1;
|
||||
}
|
||||
@ -0,0 +1,79 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file sysmem.c
|
||||
* @author Generated by STM32CubeIDE
|
||||
* @brief STM32CubeIDE System Memory calls file
|
||||
*
|
||||
* For more information about which C functions
|
||||
* need which of these lowlevel functions
|
||||
* please consult the newlib libc manual
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2023 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Includes */
|
||||
#include <errno.h>
|
||||
#include <stdint.h>
|
||||
|
||||
/**
|
||||
* Pointer to the current high watermark of the heap usage
|
||||
*/
|
||||
static uint8_t *__sbrk_heap_end = NULL;
|
||||
|
||||
/**
|
||||
* @brief _sbrk() allocates memory to the newlib heap and is used by malloc
|
||||
* and others from the C library
|
||||
*
|
||||
* @verbatim
|
||||
* ############################################################################
|
||||
* # .data # .bss # newlib heap # MSP stack #
|
||||
* # # # # Reserved by _Min_Stack_Size #
|
||||
* ############################################################################
|
||||
* ^-- RAM start ^-- _end _estack, RAM end --^
|
||||
* @endverbatim
|
||||
*
|
||||
* This implementation starts allocating at the '_end' linker symbol
|
||||
* The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
|
||||
* The implementation considers '_estack' linker symbol to be RAM end
|
||||
* NOTE: If the MSP stack, at any point during execution, grows larger than the
|
||||
* reserved size, please increase the '_Min_Stack_Size'.
|
||||
*
|
||||
* @param incr Memory size
|
||||
* @return Pointer to allocated memory
|
||||
*/
|
||||
void *_sbrk(ptrdiff_t incr)
|
||||
{
|
||||
extern uint8_t _end; /* Symbol defined in the linker script */
|
||||
extern uint8_t _estack; /* Symbol defined in the linker script */
|
||||
extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
|
||||
const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
|
||||
const uint8_t *max_heap = (uint8_t *)stack_limit;
|
||||
uint8_t *prev_heap_end;
|
||||
|
||||
/* Initialize heap end at first call */
|
||||
if (NULL == __sbrk_heap_end)
|
||||
{
|
||||
__sbrk_heap_end = &_end;
|
||||
}
|
||||
|
||||
/* Protect heap from growing into the reserved MSP stack */
|
||||
if (__sbrk_heap_end + incr > max_heap)
|
||||
{
|
||||
errno = ENOMEM;
|
||||
return (void *)-1;
|
||||
}
|
||||
|
||||
prev_heap_end = __sbrk_heap_end;
|
||||
__sbrk_heap_end += incr;
|
||||
|
||||
return (void *)prev_heap_end;
|
||||
}
|
||||
@ -0,0 +1,747 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file system_stm32f4xx.c
|
||||
* @author MCD Application Team
|
||||
* @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File.
|
||||
*
|
||||
* This file provides two functions and one global variable to be called from
|
||||
* user application:
|
||||
* - SystemInit(): This function is called at startup just after reset and
|
||||
* before branch to main program. This call is made inside
|
||||
* the "startup_stm32f4xx.s" file.
|
||||
*
|
||||
* - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
|
||||
* by the user application to setup the SysTick
|
||||
* timer or configure other parameters.
|
||||
*
|
||||
* - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
|
||||
* be called whenever the core clock is changed
|
||||
* during program execution.
|
||||
*
|
||||
*
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2017 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/** @addtogroup CMSIS
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup stm32f4xx_system
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32F4xx_System_Private_Includes
|
||||
* @{
|
||||
*/
|
||||
|
||||
|
||||
#include "stm32f4xx.h"
|
||||
|
||||
#if !defined (HSE_VALUE)
|
||||
#define HSE_VALUE ((uint32_t)25000000) /*!< Default value of the External oscillator in Hz */
|
||||
#endif /* HSE_VALUE */
|
||||
|
||||
#if !defined (HSI_VALUE)
|
||||
#define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/
|
||||
#endif /* HSI_VALUE */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32F4xx_System_Private_TypesDefinitions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32F4xx_System_Private_Defines
|
||||
* @{
|
||||
*/
|
||||
|
||||
/************************* Miscellaneous Configuration ************************/
|
||||
/*!< Uncomment the following line if you need to use external SRAM or SDRAM as data memory */
|
||||
#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx)\
|
||||
|| defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
|
||||
|| defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx)
|
||||
/* #define DATA_IN_ExtSRAM */
|
||||
#endif /* STM32F40xxx || STM32F41xxx || STM32F42xxx || STM32F43xxx || STM32F469xx || STM32F479xx ||\
|
||||
STM32F412Zx || STM32F412Vx */
|
||||
|
||||
#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
|
||||
|| defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
|
||||
/* #define DATA_IN_ExtSDRAM */
|
||||
#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx ||\
|
||||
STM32F479xx */
|
||||
|
||||
/* Note: Following vector table addresses must be defined in line with linker
|
||||
configuration. */
|
||||
/*!< Uncomment the following line if you need to relocate the vector table
|
||||
anywhere in Flash or Sram, else the vector table is kept at the automatic
|
||||
remap of boot address selected */
|
||||
/* #define USER_VECT_TAB_ADDRESS */
|
||||
|
||||
#if defined(USER_VECT_TAB_ADDRESS)
|
||||
/*!< Uncomment the following line if you need to relocate your vector Table
|
||||
in Sram else user remap will be done in Flash. */
|
||||
/* #define VECT_TAB_SRAM */
|
||||
#if defined(VECT_TAB_SRAM)
|
||||
#define VECT_TAB_BASE_ADDRESS SRAM_BASE /*!< Vector Table base address field.
|
||||
This value must be a multiple of 0x200. */
|
||||
#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field.
|
||||
This value must be a multiple of 0x200. */
|
||||
#else
|
||||
#define VECT_TAB_BASE_ADDRESS FLASH_BASE /*!< Vector Table base address field.
|
||||
This value must be a multiple of 0x200. */
|
||||
#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field.
|
||||
This value must be a multiple of 0x200. */
|
||||
#endif /* VECT_TAB_SRAM */
|
||||
#endif /* USER_VECT_TAB_ADDRESS */
|
||||
/******************************************************************************/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32F4xx_System_Private_Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32F4xx_System_Private_Variables
|
||||
* @{
|
||||
*/
|
||||
/* This variable is updated in three ways:
|
||||
1) by calling CMSIS function SystemCoreClockUpdate()
|
||||
2) by calling HAL API function HAL_RCC_GetHCLKFreq()
|
||||
3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
|
||||
Note: If you use this function to configure the system clock; then there
|
||||
is no need to call the 2 first functions listed above, since SystemCoreClock
|
||||
variable is updated automatically.
|
||||
*/
|
||||
uint32_t SystemCoreClock = 16000000;
|
||||
const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
|
||||
const uint8_t APBPrescTable[8] = {0, 0, 0, 0, 1, 2, 3, 4};
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32F4xx_System_Private_FunctionPrototypes
|
||||
* @{
|
||||
*/
|
||||
|
||||
#if defined (DATA_IN_ExtSRAM) || defined (DATA_IN_ExtSDRAM)
|
||||
static void SystemInit_ExtMemCtl(void);
|
||||
#endif /* DATA_IN_ExtSRAM || DATA_IN_ExtSDRAM */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32F4xx_System_Private_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Setup the microcontroller system
|
||||
* Initialize the FPU setting, vector table location and External memory
|
||||
* configuration.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void SystemInit(void)
|
||||
{
|
||||
/* FPU settings ------------------------------------------------------------*/
|
||||
#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
|
||||
SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */
|
||||
#endif
|
||||
|
||||
#if defined (DATA_IN_ExtSRAM) || defined (DATA_IN_ExtSDRAM)
|
||||
SystemInit_ExtMemCtl();
|
||||
#endif /* DATA_IN_ExtSRAM || DATA_IN_ExtSDRAM */
|
||||
|
||||
/* Configure the Vector Table location -------------------------------------*/
|
||||
#if defined(USER_VECT_TAB_ADDRESS)
|
||||
SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
|
||||
#endif /* USER_VECT_TAB_ADDRESS */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Update SystemCoreClock variable according to Clock Register Values.
|
||||
* The SystemCoreClock variable contains the core clock (HCLK), it can
|
||||
* be used by the user application to setup the SysTick timer or configure
|
||||
* other parameters.
|
||||
*
|
||||
* @note Each time the core clock (HCLK) changes, this function must be called
|
||||
* to update SystemCoreClock variable value. Otherwise, any configuration
|
||||
* based on this variable will be incorrect.
|
||||
*
|
||||
* @note - The system frequency computed by this function is not the real
|
||||
* frequency in the chip. It is calculated based on the predefined
|
||||
* constant and the selected clock source:
|
||||
*
|
||||
* - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
|
||||
*
|
||||
* - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
|
||||
*
|
||||
* - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**)
|
||||
* or HSI_VALUE(*) multiplied/divided by the PLL factors.
|
||||
*
|
||||
* (*) HSI_VALUE is a constant defined in stm32f4xx_hal_conf.h file (default value
|
||||
* 16 MHz) but the real value may vary depending on the variations
|
||||
* in voltage and temperature.
|
||||
*
|
||||
* (**) HSE_VALUE is a constant defined in stm32f4xx_hal_conf.h file (its value
|
||||
* depends on the application requirements), user has to ensure that HSE_VALUE
|
||||
* is same as the real frequency of the crystal used. Otherwise, this function
|
||||
* may have wrong result.
|
||||
*
|
||||
* - The result of this function could be not correct when using fractional
|
||||
* value for HSE crystal.
|
||||
*
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void SystemCoreClockUpdate(void)
|
||||
{
|
||||
uint32_t tmp = 0, pllvco = 0, pllp = 2, pllsource = 0, pllm = 2;
|
||||
|
||||
/* Get SYSCLK source -------------------------------------------------------*/
|
||||
tmp = RCC->CFGR & RCC_CFGR_SWS;
|
||||
|
||||
switch (tmp)
|
||||
{
|
||||
case 0x00: /* HSI used as system clock source */
|
||||
SystemCoreClock = HSI_VALUE;
|
||||
break;
|
||||
case 0x04: /* HSE used as system clock source */
|
||||
SystemCoreClock = HSE_VALUE;
|
||||
break;
|
||||
case 0x08: /* PLL used as system clock source */
|
||||
|
||||
/* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL_M) * PLL_N
|
||||
SYSCLK = PLL_VCO / PLL_P
|
||||
*/
|
||||
pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) >> 22;
|
||||
pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM;
|
||||
|
||||
if (pllsource != 0)
|
||||
{
|
||||
/* HSE used as PLL clock source */
|
||||
pllvco = (HSE_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* HSI used as PLL clock source */
|
||||
pllvco = (HSI_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);
|
||||
}
|
||||
|
||||
pllp = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >>16) + 1 ) *2;
|
||||
SystemCoreClock = pllvco/pllp;
|
||||
break;
|
||||
default:
|
||||
SystemCoreClock = HSI_VALUE;
|
||||
break;
|
||||
}
|
||||
/* Compute HCLK frequency --------------------------------------------------*/
|
||||
/* Get HCLK prescaler */
|
||||
tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
|
||||
/* HCLK frequency */
|
||||
SystemCoreClock >>= tmp;
|
||||
}
|
||||
|
||||
#if defined (DATA_IN_ExtSRAM) && defined (DATA_IN_ExtSDRAM)
|
||||
#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
|
||||
|| defined(STM32F469xx) || defined(STM32F479xx)
|
||||
/**
|
||||
* @brief Setup the external memory controller.
|
||||
* Called in startup_stm32f4xx.s before jump to main.
|
||||
* This function configures the external memories (SRAM/SDRAM)
|
||||
* This SRAM/SDRAM will be used as program data memory (including heap and stack).
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void SystemInit_ExtMemCtl(void)
|
||||
{
|
||||
__IO uint32_t tmp = 0x00;
|
||||
|
||||
register uint32_t tmpreg = 0, timeout = 0xFFFF;
|
||||
register __IO uint32_t index;
|
||||
|
||||
/* Enable GPIOC, GPIOD, GPIOE, GPIOF, GPIOG, GPIOH and GPIOI interface clock */
|
||||
RCC->AHB1ENR |= 0x000001F8;
|
||||
|
||||
/* Delay after an RCC peripheral clock enabling */
|
||||
tmp = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOCEN);
|
||||
|
||||
/* Connect PDx pins to FMC Alternate function */
|
||||
GPIOD->AFR[0] = 0x00CCC0CC;
|
||||
GPIOD->AFR[1] = 0xCCCCCCCC;
|
||||
/* Configure PDx pins in Alternate function mode */
|
||||
GPIOD->MODER = 0xAAAA0A8A;
|
||||
/* Configure PDx pins speed to 100 MHz */
|
||||
GPIOD->OSPEEDR = 0xFFFF0FCF;
|
||||
/* Configure PDx pins Output type to push-pull */
|
||||
GPIOD->OTYPER = 0x00000000;
|
||||
/* No pull-up, pull-down for PDx pins */
|
||||
GPIOD->PUPDR = 0x00000000;
|
||||
|
||||
/* Connect PEx pins to FMC Alternate function */
|
||||
GPIOE->AFR[0] = 0xC00CC0CC;
|
||||
GPIOE->AFR[1] = 0xCCCCCCCC;
|
||||
/* Configure PEx pins in Alternate function mode */
|
||||
GPIOE->MODER = 0xAAAA828A;
|
||||
/* Configure PEx pins speed to 100 MHz */
|
||||
GPIOE->OSPEEDR = 0xFFFFC3CF;
|
||||
/* Configure PEx pins Output type to push-pull */
|
||||
GPIOE->OTYPER = 0x00000000;
|
||||
/* No pull-up, pull-down for PEx pins */
|
||||
GPIOE->PUPDR = 0x00000000;
|
||||
|
||||
/* Connect PFx pins to FMC Alternate function */
|
||||
GPIOF->AFR[0] = 0xCCCCCCCC;
|
||||
GPIOF->AFR[1] = 0xCCCCCCCC;
|
||||
/* Configure PFx pins in Alternate function mode */
|
||||
GPIOF->MODER = 0xAA800AAA;
|
||||
/* Configure PFx pins speed to 50 MHz */
|
||||
GPIOF->OSPEEDR = 0xAA800AAA;
|
||||
/* Configure PFx pins Output type to push-pull */
|
||||
GPIOF->OTYPER = 0x00000000;
|
||||
/* No pull-up, pull-down for PFx pins */
|
||||
GPIOF->PUPDR = 0x00000000;
|
||||
|
||||
/* Connect PGx pins to FMC Alternate function */
|
||||
GPIOG->AFR[0] = 0xCCCCCCCC;
|
||||
GPIOG->AFR[1] = 0xCCCCCCCC;
|
||||
/* Configure PGx pins in Alternate function mode */
|
||||
GPIOG->MODER = 0xAAAAAAAA;
|
||||
/* Configure PGx pins speed to 50 MHz */
|
||||
GPIOG->OSPEEDR = 0xAAAAAAAA;
|
||||
/* Configure PGx pins Output type to push-pull */
|
||||
GPIOG->OTYPER = 0x00000000;
|
||||
/* No pull-up, pull-down for PGx pins */
|
||||
GPIOG->PUPDR = 0x00000000;
|
||||
|
||||
/* Connect PHx pins to FMC Alternate function */
|
||||
GPIOH->AFR[0] = 0x00C0CC00;
|
||||
GPIOH->AFR[1] = 0xCCCCCCCC;
|
||||
/* Configure PHx pins in Alternate function mode */
|
||||
GPIOH->MODER = 0xAAAA08A0;
|
||||
/* Configure PHx pins speed to 50 MHz */
|
||||
GPIOH->OSPEEDR = 0xAAAA08A0;
|
||||
/* Configure PHx pins Output type to push-pull */
|
||||
GPIOH->OTYPER = 0x00000000;
|
||||
/* No pull-up, pull-down for PHx pins */
|
||||
GPIOH->PUPDR = 0x00000000;
|
||||
|
||||
/* Connect PIx pins to FMC Alternate function */
|
||||
GPIOI->AFR[0] = 0xCCCCCCCC;
|
||||
GPIOI->AFR[1] = 0x00000CC0;
|
||||
/* Configure PIx pins in Alternate function mode */
|
||||
GPIOI->MODER = 0x0028AAAA;
|
||||
/* Configure PIx pins speed to 50 MHz */
|
||||
GPIOI->OSPEEDR = 0x0028AAAA;
|
||||
/* Configure PIx pins Output type to push-pull */
|
||||
GPIOI->OTYPER = 0x00000000;
|
||||
/* No pull-up, pull-down for PIx pins */
|
||||
GPIOI->PUPDR = 0x00000000;
|
||||
|
||||
/*-- FMC Configuration -------------------------------------------------------*/
|
||||
/* Enable the FMC interface clock */
|
||||
RCC->AHB3ENR |= 0x00000001;
|
||||
/* Delay after an RCC peripheral clock enabling */
|
||||
tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN);
|
||||
|
||||
FMC_Bank5_6->SDCR[0] = 0x000019E4;
|
||||
FMC_Bank5_6->SDTR[0] = 0x01115351;
|
||||
|
||||
/* SDRAM initialization sequence */
|
||||
/* Clock enable command */
|
||||
FMC_Bank5_6->SDCMR = 0x00000011;
|
||||
tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
|
||||
while((tmpreg != 0) && (timeout-- > 0))
|
||||
{
|
||||
tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
|
||||
}
|
||||
|
||||
/* Delay */
|
||||
for (index = 0; index<1000; index++);
|
||||
|
||||
/* PALL command */
|
||||
FMC_Bank5_6->SDCMR = 0x00000012;
|
||||
tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
|
||||
timeout = 0xFFFF;
|
||||
while((tmpreg != 0) && (timeout-- > 0))
|
||||
{
|
||||
tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
|
||||
}
|
||||
|
||||
/* Auto refresh command */
|
||||
FMC_Bank5_6->SDCMR = 0x00000073;
|
||||
tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
|
||||
timeout = 0xFFFF;
|
||||
while((tmpreg != 0) && (timeout-- > 0))
|
||||
{
|
||||
tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
|
||||
}
|
||||
|
||||
/* MRD register program */
|
||||
FMC_Bank5_6->SDCMR = 0x00046014;
|
||||
tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
|
||||
timeout = 0xFFFF;
|
||||
while((tmpreg != 0) && (timeout-- > 0))
|
||||
{
|
||||
tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
|
||||
}
|
||||
|
||||
/* Set refresh count */
|
||||
tmpreg = FMC_Bank5_6->SDRTR;
|
||||
FMC_Bank5_6->SDRTR = (tmpreg | (0x0000027C<<1));
|
||||
|
||||
/* Disable write protection */
|
||||
tmpreg = FMC_Bank5_6->SDCR[0];
|
||||
FMC_Bank5_6->SDCR[0] = (tmpreg & 0xFFFFFDFF);
|
||||
|
||||
#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
|
||||
/* Configure and enable Bank1_SRAM2 */
|
||||
FMC_Bank1->BTCR[2] = 0x00001011;
|
||||
FMC_Bank1->BTCR[3] = 0x00000201;
|
||||
FMC_Bank1E->BWTR[2] = 0x0fffffff;
|
||||
#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
|
||||
#if defined(STM32F469xx) || defined(STM32F479xx)
|
||||
/* Configure and enable Bank1_SRAM2 */
|
||||
FMC_Bank1->BTCR[2] = 0x00001091;
|
||||
FMC_Bank1->BTCR[3] = 0x00110212;
|
||||
FMC_Bank1E->BWTR[2] = 0x0fffffff;
|
||||
#endif /* STM32F469xx || STM32F479xx */
|
||||
|
||||
(void)(tmp);
|
||||
}
|
||||
#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
|
||||
#elif defined (DATA_IN_ExtSRAM) || defined (DATA_IN_ExtSDRAM)
|
||||
/**
|
||||
* @brief Setup the external memory controller.
|
||||
* Called in startup_stm32f4xx.s before jump to main.
|
||||
* This function configures the external memories (SRAM/SDRAM)
|
||||
* This SRAM/SDRAM will be used as program data memory (including heap and stack).
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void SystemInit_ExtMemCtl(void)
|
||||
{
|
||||
__IO uint32_t tmp = 0x00;
|
||||
#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
|
||||
|| defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
|
||||
#if defined (DATA_IN_ExtSDRAM)
|
||||
register uint32_t tmpreg = 0, timeout = 0xFFFF;
|
||||
register __IO uint32_t index;
|
||||
|
||||
#if defined(STM32F446xx)
|
||||
/* Enable GPIOA, GPIOC, GPIOD, GPIOE, GPIOF, GPIOG interface
|
||||
clock */
|
||||
RCC->AHB1ENR |= 0x0000007D;
|
||||
#else
|
||||
/* Enable GPIOC, GPIOD, GPIOE, GPIOF, GPIOG, GPIOH and GPIOI interface
|
||||
clock */
|
||||
RCC->AHB1ENR |= 0x000001F8;
|
||||
#endif /* STM32F446xx */
|
||||
/* Delay after an RCC peripheral clock enabling */
|
||||
tmp = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOCEN);
|
||||
|
||||
#if defined(STM32F446xx)
|
||||
/* Connect PAx pins to FMC Alternate function */
|
||||
GPIOA->AFR[0] |= 0xC0000000;
|
||||
GPIOA->AFR[1] |= 0x00000000;
|
||||
/* Configure PDx pins in Alternate function mode */
|
||||
GPIOA->MODER |= 0x00008000;
|
||||
/* Configure PDx pins speed to 50 MHz */
|
||||
GPIOA->OSPEEDR |= 0x00008000;
|
||||
/* Configure PDx pins Output type to push-pull */
|
||||
GPIOA->OTYPER |= 0x00000000;
|
||||
/* No pull-up, pull-down for PDx pins */
|
||||
GPIOA->PUPDR |= 0x00000000;
|
||||
|
||||
/* Connect PCx pins to FMC Alternate function */
|
||||
GPIOC->AFR[0] |= 0x00CC0000;
|
||||
GPIOC->AFR[1] |= 0x00000000;
|
||||
/* Configure PDx pins in Alternate function mode */
|
||||
GPIOC->MODER |= 0x00000A00;
|
||||
/* Configure PDx pins speed to 50 MHz */
|
||||
GPIOC->OSPEEDR |= 0x00000A00;
|
||||
/* Configure PDx pins Output type to push-pull */
|
||||
GPIOC->OTYPER |= 0x00000000;
|
||||
/* No pull-up, pull-down for PDx pins */
|
||||
GPIOC->PUPDR |= 0x00000000;
|
||||
#endif /* STM32F446xx */
|
||||
|
||||
/* Connect PDx pins to FMC Alternate function */
|
||||
GPIOD->AFR[0] = 0x000000CC;
|
||||
GPIOD->AFR[1] = 0xCC000CCC;
|
||||
/* Configure PDx pins in Alternate function mode */
|
||||
GPIOD->MODER = 0xA02A000A;
|
||||
/* Configure PDx pins speed to 50 MHz */
|
||||
GPIOD->OSPEEDR = 0xA02A000A;
|
||||
/* Configure PDx pins Output type to push-pull */
|
||||
GPIOD->OTYPER = 0x00000000;
|
||||
/* No pull-up, pull-down for PDx pins */
|
||||
GPIOD->PUPDR = 0x00000000;
|
||||
|
||||
/* Connect PEx pins to FMC Alternate function */
|
||||
GPIOE->AFR[0] = 0xC00000CC;
|
||||
GPIOE->AFR[1] = 0xCCCCCCCC;
|
||||
/* Configure PEx pins in Alternate function mode */
|
||||
GPIOE->MODER = 0xAAAA800A;
|
||||
/* Configure PEx pins speed to 50 MHz */
|
||||
GPIOE->OSPEEDR = 0xAAAA800A;
|
||||
/* Configure PEx pins Output type to push-pull */
|
||||
GPIOE->OTYPER = 0x00000000;
|
||||
/* No pull-up, pull-down for PEx pins */
|
||||
GPIOE->PUPDR = 0x00000000;
|
||||
|
||||
/* Connect PFx pins to FMC Alternate function */
|
||||
GPIOF->AFR[0] = 0xCCCCCCCC;
|
||||
GPIOF->AFR[1] = 0xCCCCCCCC;
|
||||
/* Configure PFx pins in Alternate function mode */
|
||||
GPIOF->MODER = 0xAA800AAA;
|
||||
/* Configure PFx pins speed to 50 MHz */
|
||||
GPIOF->OSPEEDR = 0xAA800AAA;
|
||||
/* Configure PFx pins Output type to push-pull */
|
||||
GPIOF->OTYPER = 0x00000000;
|
||||
/* No pull-up, pull-down for PFx pins */
|
||||
GPIOF->PUPDR = 0x00000000;
|
||||
|
||||
/* Connect PGx pins to FMC Alternate function */
|
||||
GPIOG->AFR[0] = 0xCCCCCCCC;
|
||||
GPIOG->AFR[1] = 0xCCCCCCCC;
|
||||
/* Configure PGx pins in Alternate function mode */
|
||||
GPIOG->MODER = 0xAAAAAAAA;
|
||||
/* Configure PGx pins speed to 50 MHz */
|
||||
GPIOG->OSPEEDR = 0xAAAAAAAA;
|
||||
/* Configure PGx pins Output type to push-pull */
|
||||
GPIOG->OTYPER = 0x00000000;
|
||||
/* No pull-up, pull-down for PGx pins */
|
||||
GPIOG->PUPDR = 0x00000000;
|
||||
|
||||
#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
|
||||
|| defined(STM32F469xx) || defined(STM32F479xx)
|
||||
/* Connect PHx pins to FMC Alternate function */
|
||||
GPIOH->AFR[0] = 0x00C0CC00;
|
||||
GPIOH->AFR[1] = 0xCCCCCCCC;
|
||||
/* Configure PHx pins in Alternate function mode */
|
||||
GPIOH->MODER = 0xAAAA08A0;
|
||||
/* Configure PHx pins speed to 50 MHz */
|
||||
GPIOH->OSPEEDR = 0xAAAA08A0;
|
||||
/* Configure PHx pins Output type to push-pull */
|
||||
GPIOH->OTYPER = 0x00000000;
|
||||
/* No pull-up, pull-down for PHx pins */
|
||||
GPIOH->PUPDR = 0x00000000;
|
||||
|
||||
/* Connect PIx pins to FMC Alternate function */
|
||||
GPIOI->AFR[0] = 0xCCCCCCCC;
|
||||
GPIOI->AFR[1] = 0x00000CC0;
|
||||
/* Configure PIx pins in Alternate function mode */
|
||||
GPIOI->MODER = 0x0028AAAA;
|
||||
/* Configure PIx pins speed to 50 MHz */
|
||||
GPIOI->OSPEEDR = 0x0028AAAA;
|
||||
/* Configure PIx pins Output type to push-pull */
|
||||
GPIOI->OTYPER = 0x00000000;
|
||||
/* No pull-up, pull-down for PIx pins */
|
||||
GPIOI->PUPDR = 0x00000000;
|
||||
#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
|
||||
|
||||
/*-- FMC Configuration -------------------------------------------------------*/
|
||||
/* Enable the FMC interface clock */
|
||||
RCC->AHB3ENR |= 0x00000001;
|
||||
/* Delay after an RCC peripheral clock enabling */
|
||||
tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN);
|
||||
|
||||
/* Configure and enable SDRAM bank1 */
|
||||
#if defined(STM32F446xx)
|
||||
FMC_Bank5_6->SDCR[0] = 0x00001954;
|
||||
#else
|
||||
FMC_Bank5_6->SDCR[0] = 0x000019E4;
|
||||
#endif /* STM32F446xx */
|
||||
FMC_Bank5_6->SDTR[0] = 0x01115351;
|
||||
|
||||
/* SDRAM initialization sequence */
|
||||
/* Clock enable command */
|
||||
FMC_Bank5_6->SDCMR = 0x00000011;
|
||||
tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
|
||||
while((tmpreg != 0) && (timeout-- > 0))
|
||||
{
|
||||
tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
|
||||
}
|
||||
|
||||
/* Delay */
|
||||
for (index = 0; index<1000; index++);
|
||||
|
||||
/* PALL command */
|
||||
FMC_Bank5_6->SDCMR = 0x00000012;
|
||||
tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
|
||||
timeout = 0xFFFF;
|
||||
while((tmpreg != 0) && (timeout-- > 0))
|
||||
{
|
||||
tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
|
||||
}
|
||||
|
||||
/* Auto refresh command */
|
||||
#if defined(STM32F446xx)
|
||||
FMC_Bank5_6->SDCMR = 0x000000F3;
|
||||
#else
|
||||
FMC_Bank5_6->SDCMR = 0x00000073;
|
||||
#endif /* STM32F446xx */
|
||||
tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
|
||||
timeout = 0xFFFF;
|
||||
while((tmpreg != 0) && (timeout-- > 0))
|
||||
{
|
||||
tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
|
||||
}
|
||||
|
||||
/* MRD register program */
|
||||
#if defined(STM32F446xx)
|
||||
FMC_Bank5_6->SDCMR = 0x00044014;
|
||||
#else
|
||||
FMC_Bank5_6->SDCMR = 0x00046014;
|
||||
#endif /* STM32F446xx */
|
||||
tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
|
||||
timeout = 0xFFFF;
|
||||
while((tmpreg != 0) && (timeout-- > 0))
|
||||
{
|
||||
tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
|
||||
}
|
||||
|
||||
/* Set refresh count */
|
||||
tmpreg = FMC_Bank5_6->SDRTR;
|
||||
#if defined(STM32F446xx)
|
||||
FMC_Bank5_6->SDRTR = (tmpreg | (0x0000050C<<1));
|
||||
#else
|
||||
FMC_Bank5_6->SDRTR = (tmpreg | (0x0000027C<<1));
|
||||
#endif /* STM32F446xx */
|
||||
|
||||
/* Disable write protection */
|
||||
tmpreg = FMC_Bank5_6->SDCR[0];
|
||||
FMC_Bank5_6->SDCR[0] = (tmpreg & 0xFFFFFDFF);
|
||||
#endif /* DATA_IN_ExtSDRAM */
|
||||
#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
|
||||
|
||||
#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx)\
|
||||
|| defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
|
||||
|| defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx)
|
||||
|
||||
#if defined(DATA_IN_ExtSRAM)
|
||||
/*-- GPIOs Configuration -----------------------------------------------------*/
|
||||
/* Enable GPIOD, GPIOE, GPIOF and GPIOG interface clock */
|
||||
RCC->AHB1ENR |= 0x00000078;
|
||||
/* Delay after an RCC peripheral clock enabling */
|
||||
tmp = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIODEN);
|
||||
|
||||
/* Connect PDx pins to FMC Alternate function */
|
||||
GPIOD->AFR[0] = 0x00CCC0CC;
|
||||
GPIOD->AFR[1] = 0xCCCCCCCC;
|
||||
/* Configure PDx pins in Alternate function mode */
|
||||
GPIOD->MODER = 0xAAAA0A8A;
|
||||
/* Configure PDx pins speed to 100 MHz */
|
||||
GPIOD->OSPEEDR = 0xFFFF0FCF;
|
||||
/* Configure PDx pins Output type to push-pull */
|
||||
GPIOD->OTYPER = 0x00000000;
|
||||
/* No pull-up, pull-down for PDx pins */
|
||||
GPIOD->PUPDR = 0x00000000;
|
||||
|
||||
/* Connect PEx pins to FMC Alternate function */
|
||||
GPIOE->AFR[0] = 0xC00CC0CC;
|
||||
GPIOE->AFR[1] = 0xCCCCCCCC;
|
||||
/* Configure PEx pins in Alternate function mode */
|
||||
GPIOE->MODER = 0xAAAA828A;
|
||||
/* Configure PEx pins speed to 100 MHz */
|
||||
GPIOE->OSPEEDR = 0xFFFFC3CF;
|
||||
/* Configure PEx pins Output type to push-pull */
|
||||
GPIOE->OTYPER = 0x00000000;
|
||||
/* No pull-up, pull-down for PEx pins */
|
||||
GPIOE->PUPDR = 0x00000000;
|
||||
|
||||
/* Connect PFx pins to FMC Alternate function */
|
||||
GPIOF->AFR[0] = 0x00CCCCCC;
|
||||
GPIOF->AFR[1] = 0xCCCC0000;
|
||||
/* Configure PFx pins in Alternate function mode */
|
||||
GPIOF->MODER = 0xAA000AAA;
|
||||
/* Configure PFx pins speed to 100 MHz */
|
||||
GPIOF->OSPEEDR = 0xFF000FFF;
|
||||
/* Configure PFx pins Output type to push-pull */
|
||||
GPIOF->OTYPER = 0x00000000;
|
||||
/* No pull-up, pull-down for PFx pins */
|
||||
GPIOF->PUPDR = 0x00000000;
|
||||
|
||||
/* Connect PGx pins to FMC Alternate function */
|
||||
GPIOG->AFR[0] = 0x00CCCCCC;
|
||||
GPIOG->AFR[1] = 0x000000C0;
|
||||
/* Configure PGx pins in Alternate function mode */
|
||||
GPIOG->MODER = 0x00085AAA;
|
||||
/* Configure PGx pins speed to 100 MHz */
|
||||
GPIOG->OSPEEDR = 0x000CAFFF;
|
||||
/* Configure PGx pins Output type to push-pull */
|
||||
GPIOG->OTYPER = 0x00000000;
|
||||
/* No pull-up, pull-down for PGx pins */
|
||||
GPIOG->PUPDR = 0x00000000;
|
||||
|
||||
/*-- FMC/FSMC Configuration --------------------------------------------------*/
|
||||
/* Enable the FMC/FSMC interface clock */
|
||||
RCC->AHB3ENR |= 0x00000001;
|
||||
|
||||
#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
|
||||
/* Delay after an RCC peripheral clock enabling */
|
||||
tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN);
|
||||
/* Configure and enable Bank1_SRAM2 */
|
||||
FMC_Bank1->BTCR[2] = 0x00001011;
|
||||
FMC_Bank1->BTCR[3] = 0x00000201;
|
||||
FMC_Bank1E->BWTR[2] = 0x0fffffff;
|
||||
#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
|
||||
#if defined(STM32F469xx) || defined(STM32F479xx)
|
||||
/* Delay after an RCC peripheral clock enabling */
|
||||
tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN);
|
||||
/* Configure and enable Bank1_SRAM2 */
|
||||
FMC_Bank1->BTCR[2] = 0x00001091;
|
||||
FMC_Bank1->BTCR[3] = 0x00110212;
|
||||
FMC_Bank1E->BWTR[2] = 0x0fffffff;
|
||||
#endif /* STM32F469xx || STM32F479xx */
|
||||
#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx)|| defined(STM32F417xx)\
|
||||
|| defined(STM32F412Zx) || defined(STM32F412Vx)
|
||||
/* Delay after an RCC peripheral clock enabling */
|
||||
tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FSMCEN);
|
||||
/* Configure and enable Bank1_SRAM2 */
|
||||
FSMC_Bank1->BTCR[2] = 0x00001011;
|
||||
FSMC_Bank1->BTCR[3] = 0x00000201;
|
||||
FSMC_Bank1E->BWTR[2] = 0x0FFFFFFF;
|
||||
#endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F412Zx || STM32F412Vx */
|
||||
|
||||
#endif /* DATA_IN_ExtSRAM */
|
||||
#endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx ||\
|
||||
STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx || STM32F412Zx || STM32F412Vx */
|
||||
(void)(tmp);
|
||||
}
|
||||
#endif /* DATA_IN_ExtSRAM && DATA_IN_ExtSDRAM */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
@ -0,0 +1,505 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file startup_stm32f407xx.s
|
||||
* @author MCD Application Team
|
||||
* @brief STM32F407xx Devices vector table for GCC based toolchains.
|
||||
* This module performs:
|
||||
* - Set the initial SP
|
||||
* - Set the initial PC == Reset_Handler,
|
||||
* - Set the vector table entries with the exceptions ISR address
|
||||
* - Branches to main in the C library (which eventually
|
||||
* calls main()).
|
||||
* After Reset the Cortex-M4 processor is in Thread mode,
|
||||
* priority is Privileged, and the Stack is set to Main.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2017 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
.syntax unified
|
||||
.cpu cortex-m4
|
||||
.fpu softvfp
|
||||
.thumb
|
||||
|
||||
.global g_pfnVectors
|
||||
.global Default_Handler
|
||||
|
||||
/* start address for the initialization values of the .data section.
|
||||
defined in linker script */
|
||||
.word _sidata
|
||||
/* start address for the .data section. defined in linker script */
|
||||
.word _sdata
|
||||
/* end address for the .data section. defined in linker script */
|
||||
.word _edata
|
||||
/* start address for the .bss section. defined in linker script */
|
||||
.word _sbss
|
||||
/* end address for the .bss section. defined in linker script */
|
||||
.word _ebss
|
||||
/* stack used for SystemInit_ExtMemCtl; always internal RAM used */
|
||||
|
||||
/**
|
||||
* @brief This is the code that gets called when the processor first
|
||||
* starts execution following a reset event. Only the absolutely
|
||||
* necessary set is performed, after which the application
|
||||
* supplied main() routine is called.
|
||||
* @param None
|
||||
* @retval : None
|
||||
*/
|
||||
|
||||
.section .text.Reset_Handler
|
||||
.weak Reset_Handler
|
||||
.type Reset_Handler, %function
|
||||
Reset_Handler:
|
||||
ldr sp, =_estack /* set stack pointer */
|
||||
|
||||
/* Copy the data segment initializers from flash to SRAM */
|
||||
ldr r0, =_sdata
|
||||
ldr r1, =_edata
|
||||
ldr r2, =_sidata
|
||||
movs r3, #0
|
||||
b LoopCopyDataInit
|
||||
|
||||
CopyDataInit:
|
||||
ldr r4, [r2, r3]
|
||||
str r4, [r0, r3]
|
||||
adds r3, r3, #4
|
||||
|
||||
LoopCopyDataInit:
|
||||
adds r4, r0, r3
|
||||
cmp r4, r1
|
||||
bcc CopyDataInit
|
||||
|
||||
/* Zero fill the bss segment. */
|
||||
ldr r2, =_sbss
|
||||
ldr r4, =_ebss
|
||||
movs r3, #0
|
||||
b LoopFillZerobss
|
||||
|
||||
FillZerobss:
|
||||
str r3, [r2]
|
||||
adds r2, r2, #4
|
||||
|
||||
LoopFillZerobss:
|
||||
cmp r2, r4
|
||||
bcc FillZerobss
|
||||
|
||||
/* Call the clock system initialization function.*/
|
||||
bl SystemInit
|
||||
/* Call static constructors */
|
||||
bl __libc_init_array
|
||||
/* Call the application's entry point.*/
|
||||
bl main
|
||||
bx lr
|
||||
.size Reset_Handler, .-Reset_Handler
|
||||
|
||||
/**
|
||||
* @brief This is the code that gets called when the processor receives an
|
||||
* unexpected interrupt. This simply enters an infinite loop, preserving
|
||||
* the system state for examination by a debugger.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
.section .text.Default_Handler,"ax",%progbits
|
||||
Default_Handler:
|
||||
Infinite_Loop:
|
||||
b Infinite_Loop
|
||||
.size Default_Handler, .-Default_Handler
|
||||
/******************************************************************************
|
||||
*
|
||||
* The minimal vector table for a Cortex M3. Note that the proper constructs
|
||||
* must be placed on this to ensure that it ends up at physical address
|
||||
* 0x0000.0000.
|
||||
*
|
||||
*******************************************************************************/
|
||||
.section .isr_vector,"a",%progbits
|
||||
.type g_pfnVectors, %object
|
||||
.size g_pfnVectors, .-g_pfnVectors
|
||||
|
||||
|
||||
g_pfnVectors:
|
||||
.word _estack
|
||||
.word Reset_Handler
|
||||
.word NMI_Handler
|
||||
.word HardFault_Handler
|
||||
.word MemManage_Handler
|
||||
.word BusFault_Handler
|
||||
.word UsageFault_Handler
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word SVC_Handler
|
||||
.word DebugMon_Handler
|
||||
.word 0
|
||||
.word PendSV_Handler
|
||||
.word SysTick_Handler
|
||||
|
||||
/* External Interrupts */
|
||||
.word WWDG_IRQHandler /* Window WatchDog */
|
||||
.word PVD_IRQHandler /* PVD through EXTI Line detection */
|
||||
.word TAMP_STAMP_IRQHandler /* Tamper and TimeStamps through the EXTI line */
|
||||
.word RTC_WKUP_IRQHandler /* RTC Wakeup through the EXTI line */
|
||||
.word FLASH_IRQHandler /* FLASH */
|
||||
.word RCC_IRQHandler /* RCC */
|
||||
.word EXTI0_IRQHandler /* EXTI Line0 */
|
||||
.word EXTI1_IRQHandler /* EXTI Line1 */
|
||||
.word EXTI2_IRQHandler /* EXTI Line2 */
|
||||
.word EXTI3_IRQHandler /* EXTI Line3 */
|
||||
.word EXTI4_IRQHandler /* EXTI Line4 */
|
||||
.word DMA1_Stream0_IRQHandler /* DMA1 Stream 0 */
|
||||
.word DMA1_Stream1_IRQHandler /* DMA1 Stream 1 */
|
||||
.word DMA1_Stream2_IRQHandler /* DMA1 Stream 2 */
|
||||
.word DMA1_Stream3_IRQHandler /* DMA1 Stream 3 */
|
||||
.word DMA1_Stream4_IRQHandler /* DMA1 Stream 4 */
|
||||
.word DMA1_Stream5_IRQHandler /* DMA1 Stream 5 */
|
||||
.word DMA1_Stream6_IRQHandler /* DMA1 Stream 6 */
|
||||
.word ADC_IRQHandler /* ADC1, ADC2 and ADC3s */
|
||||
.word CAN1_TX_IRQHandler /* CAN1 TX */
|
||||
.word CAN1_RX0_IRQHandler /* CAN1 RX0 */
|
||||
.word CAN1_RX1_IRQHandler /* CAN1 RX1 */
|
||||
.word CAN1_SCE_IRQHandler /* CAN1 SCE */
|
||||
.word EXTI9_5_IRQHandler /* External Line[9:5]s */
|
||||
.word TIM1_BRK_TIM9_IRQHandler /* TIM1 Break and TIM9 */
|
||||
.word TIM1_UP_TIM10_IRQHandler /* TIM1 Update and TIM10 */
|
||||
.word TIM1_TRG_COM_TIM11_IRQHandler /* TIM1 Trigger and Commutation and TIM11 */
|
||||
.word TIM1_CC_IRQHandler /* TIM1 Capture Compare */
|
||||
.word TIM2_IRQHandler /* TIM2 */
|
||||
.word TIM3_IRQHandler /* TIM3 */
|
||||
.word TIM4_IRQHandler /* TIM4 */
|
||||
.word I2C1_EV_IRQHandler /* I2C1 Event */
|
||||
.word I2C1_ER_IRQHandler /* I2C1 Error */
|
||||
.word I2C2_EV_IRQHandler /* I2C2 Event */
|
||||
.word I2C2_ER_IRQHandler /* I2C2 Error */
|
||||
.word SPI1_IRQHandler /* SPI1 */
|
||||
.word SPI2_IRQHandler /* SPI2 */
|
||||
.word USART1_IRQHandler /* USART1 */
|
||||
.word USART2_IRQHandler /* USART2 */
|
||||
.word USART3_IRQHandler /* USART3 */
|
||||
.word EXTI15_10_IRQHandler /* External Line[15:10]s */
|
||||
.word RTC_Alarm_IRQHandler /* RTC Alarm (A and B) through EXTI Line */
|
||||
.word OTG_FS_WKUP_IRQHandler /* USB OTG FS Wakeup through EXTI line */
|
||||
.word TIM8_BRK_TIM12_IRQHandler /* TIM8 Break and TIM12 */
|
||||
.word TIM8_UP_TIM13_IRQHandler /* TIM8 Update and TIM13 */
|
||||
.word TIM8_TRG_COM_TIM14_IRQHandler /* TIM8 Trigger and Commutation and TIM14 */
|
||||
.word TIM8_CC_IRQHandler /* TIM8 Capture Compare */
|
||||
.word DMA1_Stream7_IRQHandler /* DMA1 Stream7 */
|
||||
.word FSMC_IRQHandler /* FSMC */
|
||||
.word SDIO_IRQHandler /* SDIO */
|
||||
.word TIM5_IRQHandler /* TIM5 */
|
||||
.word SPI3_IRQHandler /* SPI3 */
|
||||
.word UART4_IRQHandler /* UART4 */
|
||||
.word UART5_IRQHandler /* UART5 */
|
||||
.word TIM6_DAC_IRQHandler /* TIM6 and DAC1&2 underrun errors */
|
||||
.word TIM7_IRQHandler /* TIM7 */
|
||||
.word DMA2_Stream0_IRQHandler /* DMA2 Stream 0 */
|
||||
.word DMA2_Stream1_IRQHandler /* DMA2 Stream 1 */
|
||||
.word DMA2_Stream2_IRQHandler /* DMA2 Stream 2 */
|
||||
.word DMA2_Stream3_IRQHandler /* DMA2 Stream 3 */
|
||||
.word DMA2_Stream4_IRQHandler /* DMA2 Stream 4 */
|
||||
.word ETH_IRQHandler /* Ethernet */
|
||||
.word ETH_WKUP_IRQHandler /* Ethernet Wakeup through EXTI line */
|
||||
.word CAN2_TX_IRQHandler /* CAN2 TX */
|
||||
.word CAN2_RX0_IRQHandler /* CAN2 RX0 */
|
||||
.word CAN2_RX1_IRQHandler /* CAN2 RX1 */
|
||||
.word CAN2_SCE_IRQHandler /* CAN2 SCE */
|
||||
.word OTG_FS_IRQHandler /* USB OTG FS */
|
||||
.word DMA2_Stream5_IRQHandler /* DMA2 Stream 5 */
|
||||
.word DMA2_Stream6_IRQHandler /* DMA2 Stream 6 */
|
||||
.word DMA2_Stream7_IRQHandler /* DMA2 Stream 7 */
|
||||
.word USART6_IRQHandler /* USART6 */
|
||||
.word I2C3_EV_IRQHandler /* I2C3 event */
|
||||
.word I2C3_ER_IRQHandler /* I2C3 error */
|
||||
.word OTG_HS_EP1_OUT_IRQHandler /* USB OTG HS End Point 1 Out */
|
||||
.word OTG_HS_EP1_IN_IRQHandler /* USB OTG HS End Point 1 In */
|
||||
.word OTG_HS_WKUP_IRQHandler /* USB OTG HS Wakeup through EXTI */
|
||||
.word OTG_HS_IRQHandler /* USB OTG HS */
|
||||
.word DCMI_IRQHandler /* DCMI */
|
||||
.word 0 /* CRYP crypto */
|
||||
.word HASH_RNG_IRQHandler /* Hash and Rng */
|
||||
.word FPU_IRQHandler /* FPU */
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
*
|
||||
* Provide weak aliases for each Exception handler to the Default_Handler.
|
||||
* As they are weak aliases, any function with the same name will override
|
||||
* this definition.
|
||||
*
|
||||
*******************************************************************************/
|
||||
.weak NMI_Handler
|
||||
.thumb_set NMI_Handler,Default_Handler
|
||||
|
||||
.weak HardFault_Handler
|
||||
.thumb_set HardFault_Handler,Default_Handler
|
||||
|
||||
.weak MemManage_Handler
|
||||
.thumb_set MemManage_Handler,Default_Handler
|
||||
|
||||
.weak BusFault_Handler
|
||||
.thumb_set BusFault_Handler,Default_Handler
|
||||
|
||||
.weak UsageFault_Handler
|
||||
.thumb_set UsageFault_Handler,Default_Handler
|
||||
|
||||
.weak SVC_Handler
|
||||
.thumb_set SVC_Handler,Default_Handler
|
||||
|
||||
.weak DebugMon_Handler
|
||||
.thumb_set DebugMon_Handler,Default_Handler
|
||||
|
||||
.weak PendSV_Handler
|
||||
.thumb_set PendSV_Handler,Default_Handler
|
||||
|
||||
.weak SysTick_Handler
|
||||
.thumb_set SysTick_Handler,Default_Handler
|
||||
|
||||
.weak WWDG_IRQHandler
|
||||
.thumb_set WWDG_IRQHandler,Default_Handler
|
||||
|
||||
.weak PVD_IRQHandler
|
||||
.thumb_set PVD_IRQHandler,Default_Handler
|
||||
|
||||
.weak TAMP_STAMP_IRQHandler
|
||||
.thumb_set TAMP_STAMP_IRQHandler,Default_Handler
|
||||
|
||||
.weak RTC_WKUP_IRQHandler
|
||||
.thumb_set RTC_WKUP_IRQHandler,Default_Handler
|
||||
|
||||
.weak FLASH_IRQHandler
|
||||
.thumb_set FLASH_IRQHandler,Default_Handler
|
||||
|
||||
.weak RCC_IRQHandler
|
||||
.thumb_set RCC_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI0_IRQHandler
|
||||
.thumb_set EXTI0_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI1_IRQHandler
|
||||
.thumb_set EXTI1_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI2_IRQHandler
|
||||
.thumb_set EXTI2_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI3_IRQHandler
|
||||
.thumb_set EXTI3_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI4_IRQHandler
|
||||
.thumb_set EXTI4_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Stream0_IRQHandler
|
||||
.thumb_set DMA1_Stream0_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Stream1_IRQHandler
|
||||
.thumb_set DMA1_Stream1_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Stream2_IRQHandler
|
||||
.thumb_set DMA1_Stream2_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Stream3_IRQHandler
|
||||
.thumb_set DMA1_Stream3_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Stream4_IRQHandler
|
||||
.thumb_set DMA1_Stream4_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Stream5_IRQHandler
|
||||
.thumb_set DMA1_Stream5_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Stream6_IRQHandler
|
||||
.thumb_set DMA1_Stream6_IRQHandler,Default_Handler
|
||||
|
||||
.weak ADC_IRQHandler
|
||||
.thumb_set ADC_IRQHandler,Default_Handler
|
||||
|
||||
.weak CAN1_TX_IRQHandler
|
||||
.thumb_set CAN1_TX_IRQHandler,Default_Handler
|
||||
|
||||
.weak CAN1_RX0_IRQHandler
|
||||
.thumb_set CAN1_RX0_IRQHandler,Default_Handler
|
||||
|
||||
.weak CAN1_RX1_IRQHandler
|
||||
.thumb_set CAN1_RX1_IRQHandler,Default_Handler
|
||||
|
||||
.weak CAN1_SCE_IRQHandler
|
||||
.thumb_set CAN1_SCE_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI9_5_IRQHandler
|
||||
.thumb_set EXTI9_5_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_BRK_TIM9_IRQHandler
|
||||
.thumb_set TIM1_BRK_TIM9_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_UP_TIM10_IRQHandler
|
||||
.thumb_set TIM1_UP_TIM10_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_TRG_COM_TIM11_IRQHandler
|
||||
.thumb_set TIM1_TRG_COM_TIM11_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_CC_IRQHandler
|
||||
.thumb_set TIM1_CC_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM2_IRQHandler
|
||||
.thumb_set TIM2_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM3_IRQHandler
|
||||
.thumb_set TIM3_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM4_IRQHandler
|
||||
.thumb_set TIM4_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C1_EV_IRQHandler
|
||||
.thumb_set I2C1_EV_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C1_ER_IRQHandler
|
||||
.thumb_set I2C1_ER_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C2_EV_IRQHandler
|
||||
.thumb_set I2C2_EV_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C2_ER_IRQHandler
|
||||
.thumb_set I2C2_ER_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI1_IRQHandler
|
||||
.thumb_set SPI1_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI2_IRQHandler
|
||||
.thumb_set SPI2_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART1_IRQHandler
|
||||
.thumb_set USART1_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART2_IRQHandler
|
||||
.thumb_set USART2_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART3_IRQHandler
|
||||
.thumb_set USART3_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI15_10_IRQHandler
|
||||
.thumb_set EXTI15_10_IRQHandler,Default_Handler
|
||||
|
||||
.weak RTC_Alarm_IRQHandler
|
||||
.thumb_set RTC_Alarm_IRQHandler,Default_Handler
|
||||
|
||||
.weak OTG_FS_WKUP_IRQHandler
|
||||
.thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM8_BRK_TIM12_IRQHandler
|
||||
.thumb_set TIM8_BRK_TIM12_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM8_UP_TIM13_IRQHandler
|
||||
.thumb_set TIM8_UP_TIM13_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM8_TRG_COM_TIM14_IRQHandler
|
||||
.thumb_set TIM8_TRG_COM_TIM14_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM8_CC_IRQHandler
|
||||
.thumb_set TIM8_CC_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Stream7_IRQHandler
|
||||
.thumb_set DMA1_Stream7_IRQHandler,Default_Handler
|
||||
|
||||
.weak FSMC_IRQHandler
|
||||
.thumb_set FSMC_IRQHandler,Default_Handler
|
||||
|
||||
.weak SDIO_IRQHandler
|
||||
.thumb_set SDIO_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM5_IRQHandler
|
||||
.thumb_set TIM5_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI3_IRQHandler
|
||||
.thumb_set SPI3_IRQHandler,Default_Handler
|
||||
|
||||
.weak UART4_IRQHandler
|
||||
.thumb_set UART4_IRQHandler,Default_Handler
|
||||
|
||||
.weak UART5_IRQHandler
|
||||
.thumb_set UART5_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM6_DAC_IRQHandler
|
||||
.thumb_set TIM6_DAC_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM7_IRQHandler
|
||||
.thumb_set TIM7_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Stream0_IRQHandler
|
||||
.thumb_set DMA2_Stream0_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Stream1_IRQHandler
|
||||
.thumb_set DMA2_Stream1_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Stream2_IRQHandler
|
||||
.thumb_set DMA2_Stream2_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Stream3_IRQHandler
|
||||
.thumb_set DMA2_Stream3_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Stream4_IRQHandler
|
||||
.thumb_set DMA2_Stream4_IRQHandler,Default_Handler
|
||||
|
||||
.weak ETH_IRQHandler
|
||||
.thumb_set ETH_IRQHandler,Default_Handler
|
||||
|
||||
.weak ETH_WKUP_IRQHandler
|
||||
.thumb_set ETH_WKUP_IRQHandler,Default_Handler
|
||||
|
||||
.weak CAN2_TX_IRQHandler
|
||||
.thumb_set CAN2_TX_IRQHandler,Default_Handler
|
||||
|
||||
.weak CAN2_RX0_IRQHandler
|
||||
.thumb_set CAN2_RX0_IRQHandler,Default_Handler
|
||||
|
||||
.weak CAN2_RX1_IRQHandler
|
||||
.thumb_set CAN2_RX1_IRQHandler,Default_Handler
|
||||
|
||||
.weak CAN2_SCE_IRQHandler
|
||||
.thumb_set CAN2_SCE_IRQHandler,Default_Handler
|
||||
|
||||
.weak OTG_FS_IRQHandler
|
||||
.thumb_set OTG_FS_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Stream5_IRQHandler
|
||||
.thumb_set DMA2_Stream5_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Stream6_IRQHandler
|
||||
.thumb_set DMA2_Stream6_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Stream7_IRQHandler
|
||||
.thumb_set DMA2_Stream7_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART6_IRQHandler
|
||||
.thumb_set USART6_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C3_EV_IRQHandler
|
||||
.thumb_set I2C3_EV_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C3_ER_IRQHandler
|
||||
.thumb_set I2C3_ER_IRQHandler,Default_Handler
|
||||
|
||||
.weak OTG_HS_EP1_OUT_IRQHandler
|
||||
.thumb_set OTG_HS_EP1_OUT_IRQHandler,Default_Handler
|
||||
|
||||
.weak OTG_HS_EP1_IN_IRQHandler
|
||||
.thumb_set OTG_HS_EP1_IN_IRQHandler,Default_Handler
|
||||
|
||||
.weak OTG_HS_WKUP_IRQHandler
|
||||
.thumb_set OTG_HS_WKUP_IRQHandler,Default_Handler
|
||||
|
||||
.weak OTG_HS_IRQHandler
|
||||
.thumb_set OTG_HS_IRQHandler,Default_Handler
|
||||
|
||||
.weak DCMI_IRQHandler
|
||||
.thumb_set DCMI_IRQHandler,Default_Handler
|
||||
|
||||
.weak HASH_RNG_IRQHandler
|
||||
.thumb_set HASH_RNG_IRQHandler,Default_Handler
|
||||
|
||||
.weak FPU_IRQHandler
|
||||
.thumb_set FPU_IRQHandler,Default_Handler
|
||||
@ -0,0 +1,11 @@
|
||||
../Core/Src/main.c:372:13:MX_GPIO_Init 1
|
||||
../Core/Src/main.c:481:6:SetInvert 2
|
||||
../Core/Src/main.c:497:6:FillMode 1
|
||||
../Core/Src/main.c:511:6:Error_Handler 1
|
||||
../Core/Src/main.c:316:13:MX_TIM2_Init 1
|
||||
../Core/Src/main.c:241:13:MX_TIM1_Init 1
|
||||
../Core/Src/main.c:204:13:MX_SPI1_Init 1
|
||||
../Core/Src/main.c:163:6:SystemClock_Config 1
|
||||
../Core/Src/main.c:68:5:main 9
|
||||
../Core/Src/main.c:432:6:PWMInit 1
|
||||
../Core/Src/main.c:425:6:ChannelSwap 1
|
||||
@ -0,0 +1,60 @@
|
||||
Core/Src/main.o: ../Core/Src/main.c ../Core/Inc/main.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
|
||||
../Core/Inc/stm32f4xx_hal_conf.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
|
||||
../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
|
||||
../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f407xx.h \
|
||||
../Drivers/CMSIS/Include/core_cm4.h \
|
||||
../Drivers/CMSIS/Include/cmsis_version.h \
|
||||
../Drivers/CMSIS/Include/cmsis_compiler.h \
|
||||
../Drivers/CMSIS/Include/cmsis_gcc.h \
|
||||
../Drivers/CMSIS/Include/mpu_armv7.h \
|
||||
../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h \
|
||||
../Core/Inc/stm_gen.h
|
||||
../Core/Inc/main.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
|
||||
../Core/Inc/stm32f4xx_hal_conf.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
|
||||
../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
|
||||
../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f407xx.h:
|
||||
../Drivers/CMSIS/Include/core_cm4.h:
|
||||
../Drivers/CMSIS/Include/cmsis_version.h:
|
||||
../Drivers/CMSIS/Include/cmsis_compiler.h:
|
||||
../Drivers/CMSIS/Include/cmsis_gcc.h:
|
||||
../Drivers/CMSIS/Include/mpu_armv7.h:
|
||||
../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h:
|
||||
../Core/Inc/stm_gen.h:
|
||||
Binary file not shown.
@ -0,0 +1,11 @@
|
||||
../Core/Src/main.c:372:13:MX_GPIO_Init 72 static
|
||||
../Core/Src/main.c:481:6:SetInvert 8 static
|
||||
../Core/Src/main.c:497:6:FillMode 0 static
|
||||
../Core/Src/main.c:511:6:Error_Handler 0 static,ignoring_inline_asm
|
||||
../Core/Src/main.c:316:13:MX_TIM2_Init 64 static
|
||||
../Core/Src/main.c:241:13:MX_TIM1_Init 96 static
|
||||
../Core/Src/main.c:204:13:MX_SPI1_Init 8 static
|
||||
../Core/Src/main.c:163:6:SystemClock_Config 88 static
|
||||
../Core/Src/main.c:68:5:main 32 static
|
||||
../Core/Src/main.c:432:6:PWMInit 72 static
|
||||
../Core/Src/main.c:425:6:ChannelSwap 24 static
|
||||
@ -0,0 +1,6 @@
|
||||
../Core/Src/stm32f4xx_hal_msp.c:66:6:HAL_MspInit 1
|
||||
../Core/Src/stm32f4xx_hal_msp.c:88:6:HAL_SPI_MspInit 2
|
||||
../Core/Src/stm32f4xx_hal_msp.c:125:6:HAL_SPI_MspDeInit 2
|
||||
../Core/Src/stm32f4xx_hal_msp.c:155:6:HAL_TIM_Base_MspInit 3
|
||||
../Core/Src/stm32f4xx_hal_msp.c:185:6:HAL_TIM_MspPostInit 3
|
||||
../Core/Src/stm32f4xx_hal_msp.c:237:6:HAL_TIM_Base_MspDeInit 3
|
||||
@ -0,0 +1,58 @@
|
||||
Core/Src/stm32f4xx_hal_msp.o: ../Core/Src/stm32f4xx_hal_msp.c \
|
||||
../Core/Inc/main.h ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
|
||||
../Core/Inc/stm32f4xx_hal_conf.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
|
||||
../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
|
||||
../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f407xx.h \
|
||||
../Drivers/CMSIS/Include/core_cm4.h \
|
||||
../Drivers/CMSIS/Include/cmsis_version.h \
|
||||
../Drivers/CMSIS/Include/cmsis_compiler.h \
|
||||
../Drivers/CMSIS/Include/cmsis_gcc.h \
|
||||
../Drivers/CMSIS/Include/mpu_armv7.h \
|
||||
../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h
|
||||
../Core/Inc/main.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
|
||||
../Core/Inc/stm32f4xx_hal_conf.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
|
||||
../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
|
||||
../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f407xx.h:
|
||||
../Drivers/CMSIS/Include/core_cm4.h:
|
||||
../Drivers/CMSIS/Include/cmsis_version.h:
|
||||
../Drivers/CMSIS/Include/cmsis_compiler.h:
|
||||
../Drivers/CMSIS/Include/cmsis_gcc.h:
|
||||
../Drivers/CMSIS/Include/mpu_armv7.h:
|
||||
../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h:
|
||||
Binary file not shown.
@ -0,0 +1,6 @@
|
||||
../Core/Src/stm32f4xx_hal_msp.c:66:6:HAL_MspInit 16 static
|
||||
../Core/Src/stm32f4xx_hal_msp.c:88:6:HAL_SPI_MspInit 48 static
|
||||
../Core/Src/stm32f4xx_hal_msp.c:125:6:HAL_SPI_MspDeInit 16 static
|
||||
../Core/Src/stm32f4xx_hal_msp.c:155:6:HAL_TIM_Base_MspInit 24 static
|
||||
../Core/Src/stm32f4xx_hal_msp.c:185:6:HAL_TIM_MspPostInit 48 static
|
||||
../Core/Src/stm32f4xx_hal_msp.c:237:6:HAL_TIM_Base_MspDeInit 16 static
|
||||
@ -0,0 +1,11 @@
|
||||
../Core/Src/stm32f4xx_it.c:68:6:NMI_Handler 1
|
||||
../Core/Src/stm32f4xx_it.c:83:6:HardFault_Handler 1
|
||||
../Core/Src/stm32f4xx_it.c:98:6:MemManage_Handler 1
|
||||
../Core/Src/stm32f4xx_it.c:113:6:BusFault_Handler 1
|
||||
../Core/Src/stm32f4xx_it.c:128:6:UsageFault_Handler 1
|
||||
../Core/Src/stm32f4xx_it.c:143:6:SVC_Handler 1
|
||||
../Core/Src/stm32f4xx_it.c:156:6:DebugMon_Handler 1
|
||||
../Core/Src/stm32f4xx_it.c:169:6:PendSV_Handler 1
|
||||
../Core/Src/stm32f4xx_it.c:182:6:SysTick_Handler 1
|
||||
../Core/Src/stm32f4xx_it.c:201:6:TIM1_UP_TIM10_IRQHandler 4
|
||||
../Core/Src/stm32f4xx_it.c:224:6:CommonChannelActions 2
|
||||
@ -0,0 +1,61 @@
|
||||
Core/Src/stm32f4xx_it.o: ../Core/Src/stm32f4xx_it.c ../Core/Inc/main.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
|
||||
../Core/Inc/stm32f4xx_hal_conf.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
|
||||
../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
|
||||
../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f407xx.h \
|
||||
../Drivers/CMSIS/Include/core_cm4.h \
|
||||
../Drivers/CMSIS/Include/cmsis_version.h \
|
||||
../Drivers/CMSIS/Include/cmsis_compiler.h \
|
||||
../Drivers/CMSIS/Include/cmsis_gcc.h \
|
||||
../Drivers/CMSIS/Include/mpu_armv7.h \
|
||||
../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h \
|
||||
../Core/Inc/stm32f4xx_it.h ../Core/Inc/stm_gen.h
|
||||
../Core/Inc/main.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
|
||||
../Core/Inc/stm32f4xx_hal_conf.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
|
||||
../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
|
||||
../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f407xx.h:
|
||||
../Drivers/CMSIS/Include/core_cm4.h:
|
||||
../Drivers/CMSIS/Include/cmsis_version.h:
|
||||
../Drivers/CMSIS/Include/cmsis_compiler.h:
|
||||
../Drivers/CMSIS/Include/cmsis_gcc.h:
|
||||
../Drivers/CMSIS/Include/mpu_armv7.h:
|
||||
../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h:
|
||||
../Core/Inc/stm32f4xx_it.h:
|
||||
../Core/Inc/stm_gen.h:
|
||||
Binary file not shown.
@ -0,0 +1,11 @@
|
||||
../Core/Src/stm32f4xx_it.c:68:6:NMI_Handler 4 static
|
||||
../Core/Src/stm32f4xx_it.c:83:6:HardFault_Handler 4 static
|
||||
../Core/Src/stm32f4xx_it.c:98:6:MemManage_Handler 4 static
|
||||
../Core/Src/stm32f4xx_it.c:113:6:BusFault_Handler 4 static
|
||||
../Core/Src/stm32f4xx_it.c:128:6:UsageFault_Handler 4 static
|
||||
../Core/Src/stm32f4xx_it.c:143:6:SVC_Handler 4 static
|
||||
../Core/Src/stm32f4xx_it.c:156:6:DebugMon_Handler 4 static
|
||||
../Core/Src/stm32f4xx_it.c:169:6:PendSV_Handler 4 static
|
||||
../Core/Src/stm32f4xx_it.c:182:6:SysTick_Handler 8 static
|
||||
../Core/Src/stm32f4xx_it.c:201:6:TIM1_UP_TIM10_IRQHandler 16 static
|
||||
../Core/Src/stm32f4xx_it.c:224:6:CommonChannelActions 32 static
|
||||
@ -0,0 +1,44 @@
|
||||
################################################################################
|
||||
# Automatically-generated file. Do not edit!
|
||||
# Toolchain: GNU Tools for STM32 (11.3.rel1)
|
||||
################################################################################
|
||||
|
||||
# Add inputs and outputs from these tool invocations to the build variables
|
||||
C_SRCS += \
|
||||
../Core/Src/main.c \
|
||||
../Core/Src/stm32f4xx_hal_msp.c \
|
||||
../Core/Src/stm32f4xx_it.c \
|
||||
../Core/Src/syscalls.c \
|
||||
../Core/Src/sysmem.c \
|
||||
../Core/Src/system_stm32f4xx.c
|
||||
|
||||
OBJS += \
|
||||
./Core/Src/main.o \
|
||||
./Core/Src/stm32f4xx_hal_msp.o \
|
||||
./Core/Src/stm32f4xx_it.o \
|
||||
./Core/Src/syscalls.o \
|
||||
./Core/Src/sysmem.o \
|
||||
./Core/Src/system_stm32f4xx.o
|
||||
|
||||
C_DEPS += \
|
||||
./Core/Src/main.d \
|
||||
./Core/Src/stm32f4xx_hal_msp.d \
|
||||
./Core/Src/stm32f4xx_it.d \
|
||||
./Core/Src/syscalls.d \
|
||||
./Core/Src/sysmem.d \
|
||||
./Core/Src/system_stm32f4xx.d
|
||||
|
||||
|
||||
# Each subdirectory must supply rules for building sources it contributes
|
||||
Core/Src/main.o: ../Core/Src/main.c Core/Src/subdir.mk
|
||||
arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DUSE_HAL_DRIVER -DSTM32F407xx -c -I../Core/Inc -I../Drivers/STM32F4xx_HAL_Driver/Inc -I../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32F4xx/Include -I../Drivers/CMSIS/Include -Og -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
|
||||
Core/Src/%.o Core/Src/%.su Core/Src/%.cyclo: ../Core/Src/%.c Core/Src/subdir.mk
|
||||
arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DUSE_HAL_DRIVER -DSTM32F407xx -c -I../Core/Inc -I../Drivers/STM32F4xx_HAL_Driver/Inc -I../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32F4xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
|
||||
|
||||
clean: clean-Core-2f-Src
|
||||
|
||||
clean-Core-2f-Src:
|
||||
-$(RM) ./Core/Src/main.cyclo ./Core/Src/main.d ./Core/Src/main.o ./Core/Src/main.su ./Core/Src/stm32f4xx_hal_msp.cyclo ./Core/Src/stm32f4xx_hal_msp.d ./Core/Src/stm32f4xx_hal_msp.o ./Core/Src/stm32f4xx_hal_msp.su ./Core/Src/stm32f4xx_it.cyclo ./Core/Src/stm32f4xx_it.d ./Core/Src/stm32f4xx_it.o ./Core/Src/stm32f4xx_it.su ./Core/Src/syscalls.cyclo ./Core/Src/syscalls.d ./Core/Src/syscalls.o ./Core/Src/syscalls.su ./Core/Src/sysmem.cyclo ./Core/Src/sysmem.d ./Core/Src/sysmem.o ./Core/Src/sysmem.su ./Core/Src/system_stm32f4xx.cyclo ./Core/Src/system_stm32f4xx.d ./Core/Src/system_stm32f4xx.o ./Core/Src/system_stm32f4xx.su
|
||||
|
||||
.PHONY: clean-Core-2f-Src
|
||||
|
||||
@ -0,0 +1,18 @@
|
||||
../Core/Src/syscalls.c:44:6:initialise_monitor_handles 1
|
||||
../Core/Src/syscalls.c:48:5:_getpid 1
|
||||
../Core/Src/syscalls.c:53:5:_kill 1
|
||||
../Core/Src/syscalls.c:61:6:_exit 1
|
||||
../Core/Src/syscalls.c:67:27:_read 2
|
||||
../Core/Src/syscalls.c:80:27:_write 2
|
||||
../Core/Src/syscalls.c:92:5:_close 1
|
||||
../Core/Src/syscalls.c:99:5:_fstat 1
|
||||
../Core/Src/syscalls.c:106:5:_isatty 1
|
||||
../Core/Src/syscalls.c:112:5:_lseek 1
|
||||
../Core/Src/syscalls.c:120:5:_open 1
|
||||
../Core/Src/syscalls.c:128:5:_wait 1
|
||||
../Core/Src/syscalls.c:135:5:_unlink 1
|
||||
../Core/Src/syscalls.c:142:5:_times 1
|
||||
../Core/Src/syscalls.c:148:5:_stat 1
|
||||
../Core/Src/syscalls.c:155:5:_link 1
|
||||
../Core/Src/syscalls.c:163:5:_fork 1
|
||||
../Core/Src/syscalls.c:169:5:_execve 1
|
||||
@ -0,0 +1 @@
|
||||
Core/Src/syscalls.o: ../Core/Src/syscalls.c
|
||||
Binary file not shown.
@ -0,0 +1,18 @@
|
||||
../Core/Src/syscalls.c:44:6:initialise_monitor_handles 4 static
|
||||
../Core/Src/syscalls.c:48:5:_getpid 4 static
|
||||
../Core/Src/syscalls.c:53:5:_kill 16 static
|
||||
../Core/Src/syscalls.c:61:6:_exit 16 static
|
||||
../Core/Src/syscalls.c:67:27:_read 32 static
|
||||
../Core/Src/syscalls.c:80:27:_write 32 static
|
||||
../Core/Src/syscalls.c:92:5:_close 16 static
|
||||
../Core/Src/syscalls.c:99:5:_fstat 16 static
|
||||
../Core/Src/syscalls.c:106:5:_isatty 16 static
|
||||
../Core/Src/syscalls.c:112:5:_lseek 24 static
|
||||
../Core/Src/syscalls.c:120:5:_open 12 static
|
||||
../Core/Src/syscalls.c:128:5:_wait 16 static
|
||||
../Core/Src/syscalls.c:135:5:_unlink 16 static
|
||||
../Core/Src/syscalls.c:142:5:_times 16 static
|
||||
../Core/Src/syscalls.c:148:5:_stat 16 static
|
||||
../Core/Src/syscalls.c:155:5:_link 16 static
|
||||
../Core/Src/syscalls.c:163:5:_fork 8 static
|
||||
../Core/Src/syscalls.c:169:5:_execve 24 static
|
||||
@ -0,0 +1 @@
|
||||
../Core/Src/sysmem.c:53:7:_sbrk 3
|
||||
@ -0,0 +1 @@
|
||||
Core/Src/sysmem.o: ../Core/Src/sysmem.c
|
||||
Binary file not shown.
@ -0,0 +1 @@
|
||||
../Core/Src/sysmem.c:53:7:_sbrk 32 static
|
||||
@ -0,0 +1,2 @@
|
||||
../Core/Src/system_stm32f4xx.c:167:6:SystemInit 1
|
||||
../Core/Src/system_stm32f4xx.c:220:6:SystemCoreClockUpdate 6
|
||||
@ -0,0 +1,57 @@
|
||||
Core/Src/system_stm32f4xx.o: ../Core/Src/system_stm32f4xx.c \
|
||||
../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
|
||||
../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f407xx.h \
|
||||
../Drivers/CMSIS/Include/core_cm4.h \
|
||||
../Drivers/CMSIS/Include/cmsis_version.h \
|
||||
../Drivers/CMSIS/Include/cmsis_compiler.h \
|
||||
../Drivers/CMSIS/Include/cmsis_gcc.h \
|
||||
../Drivers/CMSIS/Include/mpu_armv7.h \
|
||||
../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
|
||||
../Core/Inc/stm32f4xx_hal_conf.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h
|
||||
../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
|
||||
../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f407xx.h:
|
||||
../Drivers/CMSIS/Include/core_cm4.h:
|
||||
../Drivers/CMSIS/Include/cmsis_version.h:
|
||||
../Drivers/CMSIS/Include/cmsis_compiler.h:
|
||||
../Drivers/CMSIS/Include/cmsis_gcc.h:
|
||||
../Drivers/CMSIS/Include/mpu_armv7.h:
|
||||
../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
|
||||
../Core/Inc/stm32f4xx_hal_conf.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h:
|
||||
Binary file not shown.
@ -0,0 +1,2 @@
|
||||
../Core/Src/system_stm32f4xx.c:167:6:SystemInit 4 static
|
||||
../Core/Src/system_stm32f4xx.c:220:6:SystemCoreClockUpdate 32 static
|
||||
@ -0,0 +1,2 @@
|
||||
Core/Startup/startup_stm32f407vetx.o: \
|
||||
../Core/Startup/startup_stm32f407vetx.s
|
||||
Binary file not shown.
@ -0,0 +1,27 @@
|
||||
################################################################################
|
||||
# Automatically-generated file. Do not edit!
|
||||
# Toolchain: GNU Tools for STM32 (11.3.rel1)
|
||||
################################################################################
|
||||
|
||||
# Add inputs and outputs from these tool invocations to the build variables
|
||||
S_SRCS += \
|
||||
../Core/Startup/startup_stm32f407vetx.s
|
||||
|
||||
OBJS += \
|
||||
./Core/Startup/startup_stm32f407vetx.o
|
||||
|
||||
S_DEPS += \
|
||||
./Core/Startup/startup_stm32f407vetx.d
|
||||
|
||||
|
||||
# Each subdirectory must supply rules for building sources it contributes
|
||||
Core/Startup/%.o: ../Core/Startup/%.s Core/Startup/subdir.mk
|
||||
arm-none-eabi-gcc -mcpu=cortex-m4 -g3 -DDEBUG -c -x assembler-with-cpp -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@" "$<"
|
||||
|
||||
clean: clean-Core-2f-Startup
|
||||
|
||||
clean-Core-2f-Startup:
|
||||
-$(RM) ./Core/Startup/startup_stm32f407vetx.d ./Core/Startup/startup_stm32f407vetx.o
|
||||
|
||||
.PHONY: clean-Core-2f-Startup
|
||||
|
||||
@ -0,0 +1,27 @@
|
||||
../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:157:19:HAL_Init 1
|
||||
../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:190:19:HAL_DeInit 1
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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||||
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||||
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||||
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|
||||
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|
||||
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|
||||
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||||
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||||
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|
||||
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||||
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||||
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||||
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||||
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|
||||
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|
||||
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|
||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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|
||||
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||||
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||||
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|
||||
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|
||||
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|
||||
Binary file not shown.
@ -0,0 +1,27 @@
|
||||
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|
||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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||||
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||||
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||||
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||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
@ -0,0 +1,58 @@
|
||||
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|
||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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|
||||
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||||
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||||
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|
||||
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||||
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||||
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|
||||
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|
||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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||||
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|
||||
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|
||||
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|
||||
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|
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|
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|
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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||||
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|
||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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|
||||
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||||
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||||
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||||
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|
||||
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|
||||
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|
||||
Binary file not shown.
@ -0,0 +1,15 @@
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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||||
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|
||||
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|
||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
Binary file not shown.
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||||
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|
||||
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||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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||||
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|
||||
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|
||||
../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c:466:10:HAL_EXTI_GetPending 1
|
||||
../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c:495:6:HAL_EXTI_ClearPending 1
|
||||
../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c:516:6:HAL_EXTI_GenerateSWI 1
|
||||
@ -0,0 +1,58 @@
|
||||
Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.o: \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
|
||||
../Core/Inc/stm32f4xx_hal_conf.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
|
||||
../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
|
||||
../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f407xx.h \
|
||||
../Drivers/CMSIS/Include/core_cm4.h \
|
||||
../Drivers/CMSIS/Include/cmsis_version.h \
|
||||
../Drivers/CMSIS/Include/cmsis_compiler.h \
|
||||
../Drivers/CMSIS/Include/cmsis_gcc.h \
|
||||
../Drivers/CMSIS/Include/mpu_armv7.h \
|
||||
../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
|
||||
../Core/Inc/stm32f4xx_hal_conf.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
|
||||
../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
|
||||
../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f407xx.h:
|
||||
../Drivers/CMSIS/Include/core_cm4.h:
|
||||
../Drivers/CMSIS/Include/cmsis_version.h:
|
||||
../Drivers/CMSIS/Include/cmsis_compiler.h:
|
||||
../Drivers/CMSIS/Include/cmsis_gcc.h:
|
||||
../Drivers/CMSIS/Include/mpu_armv7.h:
|
||||
../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h:
|
||||
Binary file not shown.
@ -0,0 +1,9 @@
|
||||
../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c:142:19:HAL_EXTI_SetConfigLine 32 static
|
||||
../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c:237:19:HAL_EXTI_GetConfigLine 32 static
|
||||
../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c:316:19:HAL_EXTI_ClearConfigLine 32 static
|
||||
../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c:369:19:HAL_EXTI_RegisterCallback 32 static
|
||||
../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c:394:19:HAL_EXTI_GetHandle 16 static
|
||||
../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c:434:6:HAL_EXTI_IRQHandler 24 static
|
||||
../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c:466:10:HAL_EXTI_GetPending 32 static
|
||||
../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c:495:6:HAL_EXTI_ClearPending 24 static
|
||||
../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c:516:6:HAL_EXTI_GenerateSWI 24 static
|
||||
@ -0,0 +1,17 @@
|
||||
../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c:154:19:HAL_FLASH_Program 6
|
||||
../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c:212:19:HAL_FLASH_Program_IT 5
|
||||
../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c:259:6:HAL_FLASH_IRQHandler 9
|
||||
../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c:382:13:HAL_FLASH_EndOfOperationCallback 1
|
||||
../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c:399:13:HAL_FLASH_OperationErrorCallback 1
|
||||
../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c:431:19:HAL_FLASH_Unlock 3
|
||||
../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c:455:19:HAL_FLASH_Lock 1
|
||||
../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c:467:19:HAL_FLASH_OB_Unlock 2
|
||||
../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c:487:19:HAL_FLASH_OB_Lock 1
|
||||
../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c:499:19:HAL_FLASH_OB_Launch 1
|
||||
../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c:536:10:HAL_FLASH_GetError 1
|
||||
../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c:550:19:FLASH_WaitForLastOperation 7
|
||||
../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c:610:13:FLASH_Program_DoubleWord 1
|
||||
../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c:644:13:FLASH_Program_Word 1
|
||||
../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c:669:13:FLASH_Program_HalfWord 1
|
||||
../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c:694:13:FLASH_Program_Byte 1
|
||||
../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c:711:13:FLASH_SetErrorCode 6
|
||||
@ -0,0 +1,58 @@
|
||||
Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.o: \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
|
||||
../Core/Inc/stm32f4xx_hal_conf.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
|
||||
../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
|
||||
../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f407xx.h \
|
||||
../Drivers/CMSIS/Include/core_cm4.h \
|
||||
../Drivers/CMSIS/Include/cmsis_version.h \
|
||||
../Drivers/CMSIS/Include/cmsis_compiler.h \
|
||||
../Drivers/CMSIS/Include/cmsis_gcc.h \
|
||||
../Drivers/CMSIS/Include/mpu_armv7.h \
|
||||
../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
|
||||
../Core/Inc/stm32f4xx_hal_conf.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
|
||||
../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
|
||||
../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f407xx.h:
|
||||
../Drivers/CMSIS/Include/core_cm4.h:
|
||||
../Drivers/CMSIS/Include/cmsis_version.h:
|
||||
../Drivers/CMSIS/Include/cmsis_compiler.h:
|
||||
../Drivers/CMSIS/Include/cmsis_gcc.h:
|
||||
../Drivers/CMSIS/Include/mpu_armv7.h:
|
||||
../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h:
|
||||
Binary file not shown.
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in new issue