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#include "IDIBUS_IMPL_Custom.h"
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int data_flag = 0;
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uint8_t data_to_send[10] = {0};
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void IDIBUS_CustomInit(){
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IDIBUS_MODULE.STATUS.STATE.B0S.StError = 0;
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IDIBUS_MODULE.STATUS.STATE.B0S.StState = IDISTATUS_B0S_ST_STATE_StOperate;
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IDIBUS_MODULE.STATUS.STATE.B0S.AesSupported = 0;
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IDIBUS_MODULE.STATUS.STATE.B0S.AesInstalled = 0;
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IDIBUS_MODULE.STATUS.STATE.B0S.SendAlarmL0 = 0;
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IDIBUS_MODULE.STATUS.STATE.B0S.SendAlarmL1 = 0;
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IDIBUS_MODULE.STATUS.STATE.B1S.ModuleType = IDISTATUS_B1S_MODULE_TYPE_Slave;
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IDIBUS_MODULE.STATUS.STATE.B1S.BridgeConnected = 0;
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IDIBUS_MODULE.STATUS.STATE.B1S.SelfInit = 1;
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IDIBUS_MODULE.STATUS.STATE.B1S.TimeoutLed = 0;
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IDIBUS_MODULE.STATUS.STATE.B1S.NoMMESTimeout = 0;
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IDIBUS_MODULE.STATUS.STATE.B1S.CatchAlarmL0 = 0;
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IDIBUS_MODULE.STATUS.STATE.B1S.CatchAlarmL1 = 0;
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IDIBUS_MODULE.Devices = IDIBUS_DEVICES;
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IDIBUS_MODULE.DevicesCount = IDIBUS_DEVICES_NUMBER;
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IDIBUS_MODULE.Devices[IDIBUS_GEN_DEV].Channels = &IDIBUS_GEN_CHNLS[0];
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IDIBUS_MODULE.Devices[IDIBUS_GEN_DEV].ChannelsCount = GEN_CHN_COUNT;
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for (uint8_t I=0; I < GEN_CHN_COUNT; I++)
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{
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IDIBUS_MODULE.Devices[IDIBUS_GEN_DEV].Channels[I].ChNum = I;
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IDIBUS_MODULE.Devices[IDIBUS_GEN_DEV].Channels[I].LONG_OP.Type = 0;
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IDIBUS_MODULE.Devices[IDIBUS_GEN_DEV].Channels[I].LONG_OP.State = IDILONGOP_STATE_COMPLETE_NO_ERR;
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IDIBUS_MODULE.Devices[IDIBUS_GEN_DEV].Channels[I].BcastAddr = IDIBUS_GROUP_0_ADDR;
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IDIBUS_MODULE.Devices[IDIBUS_GEN_DEV].Channels[I].CH_Func = IDIBUS_GEN_ChannelHandler;
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}
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}
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//-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
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void IDIBUS_GEN_ChannelHandler(struct IDIBUS_CHANNEL_STR* CH, IDIBUS_FARG_TYPE *farg){
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if ( IDIBUS_CnannelStaticFunc(CH, farg) != 0) { return; }
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if (CH->ChNum >= GEN_CHN_COUNT) {IDIBUS_ResponseProtectedWrite(farg, NULL, 0, IDIERDEV_INVALID_CHN_NUM); return;}
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switch (farg->ComFunc)
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{
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case (0x01) : { // Start
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if ( farg->InpDataLength == 0 ) { IDIBUS_ResponseProtectedWrite(farg, NULL, 0, IDIERSLV_INVALID_RX_REQUEST_FORMAT); }
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else
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{
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uint8_t ErrorSt = IDIER_NOPE;
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memcpy(data_to_send, farg->InpData, sizeof(data_to_send));
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if (sizeof(data_to_send) / sizeof(data_to_send[0]) != 0) {
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data_flag = 1;
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}
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TCCR2A |= (1 << WGM21); // CTC
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TCCR2B |= (1 << CS21); // Prescaler
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OCR2A = 1;
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TIMSK2 = (1<<OCIE2A);
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IDIBUS_ResponseProtectedWrite(farg, NULL, 0, ErrorSt);
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}
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break;
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}
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case (0x02) : { // STM Reset
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uint8_t ErrorSt = IDIER_NOPE;
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STMReset();
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IDIBUS_ResponseProtectedWrite(farg, NULL, 0, ErrorSt);
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}
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default : { IDIBUS_ResponseProtectedWrite(farg, NULL, 0, IDIERSLV_UNSUPPORTED_FUNC_NUM); }
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}
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}
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//-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
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ISR(TIMER2_COMPA_vect) {
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TimerStop;
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ResetTimer;
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switch (CurrentState) {
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case GEN_Wait: {
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_delay_ms(10);
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while (data_flag == 0); // <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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CurrentState = GEN_Send;
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break;
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}
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case GEN_Send: {
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CurrentState = GEN_Wait;
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TimerTime = 100; // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - 150 <20><>
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STMReset();
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if ((PINC)&(1<<PORTC3)) { // STM <20><><EFBFBD><EFBFBD><EFBFBD> <20> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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_delay_ms(10);
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for (uint8_t i = 0; i < 10; i++) {
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SPI_MasterTransmit(data_to_send[i]);
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}
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}
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TimerStartTick;
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break;
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}
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}
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}
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void STMReset() {
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DDRC |= (1 << PINC4);
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PORTC &= ~(1 << PINC4);
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_delay_ms(100);
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DDRC &= ~(1 << PINC4);
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_delay_ms(100);
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} |
